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PDF LM9820CCWM Data sheet ( Hoja de datos )
| Número de pieza | LM9820CCWM | |
| Descripción | LM9810/20 10/12-Bit Image Sensor Processor Analog Front End | |
| Fabricantes | National Semiconductor | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de LM9820CCWM (archivo pdf) en la parte inferior de esta página. Total 21 Páginas | ||
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July 1998
N
LM9810/20 10/12-Bit Image Sensor Processor Analog Front End
General Description
The LM9810 and LM9820 are high performance Analog Front
Ends (AFEs) for image sensor processing systems. The
LM9810/20 performs all the analog and mixed signal functions
(correlated double sampling, color specific gain and offset cor-
rection, and analog to digital conversion) necessary to digitize
the output of a wide variety of CIS and CCD sensors. The
LM9810 has a 10 bit 6MHz ADC, and the LM9820 has a 12 bit
6MHz ADC. The LM9810 and LM9820 are pin-for-pin and func-
tionally compatible.
Applications
• Color Flatbed Document Scanners
• Color Sheetfed Scanners
• Multifunction Imaging Products
• Digital Copiers
• General Purpose Linear CCD Imaging
Features
• 6 million pixels/s conversion rate
• Digitally programmed gain and offset for red, green and blue
pixels
• Correlated Double Sampling for lowest noise
• TTL/CMOS input/output compatible
Key Specifications
• Output Data Resolution
• Pixel Conversion Rate
• Supply Voltage
• Power Dissipation
10/12 Bits
6MHz
5V±5%
300mW
Connection Diagrams
VREF-
VREFMID
VREF+
RefBypass
OSR
OSG
OSB
AGND
VA
SampCLK
1
2
3
4
5
6
7
8
9
10
LM9810
&
LM9820
20 DGND
19 VD
18 MCLK
17 D5
16 D4
15 D3
14 D2 (SCLK)
13 D1 (Latch)
12 D0 (SDI)
11 NewLine
Ordering Information
Commercial (0°C ≤ TA ≤ +70°C)
Package
LM9810CCWM
LM9810CCWMX
LM9820CCWM
LM9820CCWMX
20 Pin Wide SOIC
20 Pin Wide SOIC, Tape & Reel
20 Pin Wide SOIC
20 Pin Wide SOIC, Tape & Reel
TRI-STATE® is a registered trademark of National Semiconductor Corporation.
©1997,1998 National Semiconductor Corporation
1
http://www.national.com
1 page  
LM9820 Electrical Characteristics (Continued)
The following specifications apply for AGND=DGND=0V, VA=VD=+5.0VDC, fMCLK=24MHz, Rs=25Ω. Boldface limits apply for
TA=TJ=TMIN to TMAX; all other limits TA=TJ=25°C. All LSB limits are in units of the LM9820’s 12 bit ADC. (Notes 7, 8, & 12)
Symbol
Parameter
Conditions
Typical
(Note 9)
Limits
Units
(Note 10) (Limits)
Static Offset DAC Characteristics
Monotonicity
6 bits (min)
Offset DAC LSB size
PGA gain = 1
20
14 LSB (min)
26 LSB (max)
Offset DAC Adjustment Range
PGA gain = 1
±590
±575 LSB (min)
System Characteristics (see section 1.7.1, Internal Offsets)
C
Analog Channel Gain Constant
(ADC Codes/V)
Includes voltage reference
variation, gain setting = 1
2008
1873
2129
LSB (min)
LSB (max)
VOS1
Pre-Boost Analog Channel Offset Error,
CCD Mode
17.6
-32.1
+68.9
LSB (min)
LSB (max)
VOS1
Pre-Boost Analog Channel Offset Error,
CIS Mode
18
-22.2
+57
LSB (min)
LSB (max)
VOS2 Pre-PGA Analog Channel Offset Error
-40
-94.3
+16.4
LSB (min)
LSB (max)
VOS3 Post-PGA Analog Channel Offset Error
-44
-121
+28
LSB (min)
LSB (max)
DC and Logic Electrical Characteristics
The following specifications apply for AGND=DGND=0V, VA=VD=+5.0VDC, fMCLK=24MHz, Rs=25Ω. Boldface limits apply for
TA=TJ=TMIN to TMAX; all other limits TA=TJ=25°C. (Notes 7 & 8)
Symbol
Parameter
Conditions
Typical Limits
Units
(Note 9) (Note 10) (Limits)
D0-D2, MCLK, NewLine, SampCLK Digital Input Characteristics
VIN(1)
VIN(0)
Logical “1” Input Voltage
Logical “0” Input Voltage
IIN Input Leakage Current
CIN Input Capacitance
D0-D5 Digital Output Characteristics
VD=5.25V
VD=4.75V
VIN=VD
VIN=DGND
2.0 V (max)
0.8 V (min)
0.1 µA(max)
-0.1 µA(max)
5 pF
VOUT(1) Logical “1” Output Voltage
VOUT(0)
IOUT
Logical “0” Output Voltage
TRI-STATE® Output Current
(D0-D5 only)
Power Supply Characteristics
VD=4.75V, IOUT=-360µA
VD=4.75V, IOUT=-10µA
VD=5.25V, IOUT=1.6mA
VOUT=DGND
VOUT=VD
2.4 V (min)
4.4 V (min)
0.4 V (max)
0.1 µA
-0.1 µA
IA Analog Supply Current
Operating
Standby with input clocks stopped
Standby with input clocks running
45
0.8
3.0
57 mA (max)
0.9 mA (max)
mA
ID Digital Supply Current (Note 15)
Operating
Standby with input clocks stopped
Standby with input clocks running
220
110
220
320 µA (max)
200 µA (max)
µA
5 http://www.national.com
5 Page 
Table 1: Configuration Register Address Table
Address
(Decimal)
0
1
2
3
4
5
6
7
Address
(Binary)
A2 A1 A0
000
001
010
011
100
101
110
111
Data Bits
B5
CDS
Polarity
Polarity
Polarity
x3
x3
x3
Test
B4 B3 B3 B2
Sampler and Color Mode
Polarity
N/A
Mode2
Mode1
Red DAC Offset Setting
MSB
Green DAC Offset Setting
MSB
Blue DAC Offset Setting
MSB
Red Gain Setting
MSB
Green Gain Setting
MSB
Blue Gain Setting
MSB
Production Test and Power Down
Test Test Test Test
B1
Mode0
LSB
LSB
LSB
LSB
LSB
LSB
PD
11 http://www.national.com
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| Páginas | Total 21 Páginas | |
| PDF Descargar | [ Datasheet LM9820CCWM.PDF ] | |
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