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Número de pieza | APW7057 | |
Descripción | High Power Step-Down Synchronous DC/DC Controller | |
Fabricantes | Etc | |
Logotipo | ||
Hay una vista previa y un enlace de descarga de APW7057 (archivo pdf) en la parte inferior de esta página. Total 14 Páginas | ||
No Preview Available ! APW7057
High Power Step-Down Synchronous DC/DC Controller
Features
• Operates from +5V Input
• 0.8V Internal Reference Voltage
- ±1.5% Accuracy Over Line, Load and Temp.
•
0.8V to V Output Range
CC
• Full Duty Cycle Range
- 0% to 100%
• Internal Loop Compensation
• Internal Soft Start
- Typical 2ms
• Programmable Over-Current Protection
- Lossless Sensing Using MOSFET RDS (ON)
• Under-Voltage Protection
• Drives External N-Channel MOSFETs
• Shutdown Control
• Small SOP-8 Package
Applications
• Motherboard
• Graphics Cards
• Cable or DSL Modems, Set Top Boxes
• DSP Supplies
• Memory Supplies
• 5V Input DC-DC Regulators
• Distributed Power Supplies
General Description
The APW7057 is a 300kHz constant frequency volt-
age mode synchronous switching controller that drives
external N-channel MOSFETs. When the input sup-
ply drops close to output, the upper MOSFET remains
on, achieving 100% duty cycle. Internal loop compen-
sation is optimized for fast transient response, elimi-
nating external compensation network. The precision
0.8V reference makes this part suitable for a wide va-
riety of low voltage applications. Soft start is internally
set to 2ms, limiting the input in-rush current and pre-
venting the output from overshoot during powering up.
The APW7057 has over current and short circuit
protections. Over current protection is achieved by
monitoring the voltage drop across the high side
MOSFET, eliminating the need for a current sens-
ing resistor and short circuit condition is detected
through the FB pin. If either fault conditions occur,
the APW7057 would initiate the soft start cycle. After
three cycles and if the fault condition persists, the
controller will be shut down. To restart the controller,
either recycle the VCC supply or momentarily pull the
OSCSET pin below 1.25V.
The APW7057 can be shutdown by pulling the OCSET
pin below 1.25V. In shutdown, both gate drive signals
will be low. The controller is available in a small SOP-
8 package.
Pinouts
BOOT
UGATE
GND
LGATE
1
2
3
4
8 PHASE
7 OCSET
6 FB
5 VCC
SOP-8 (Top View )
ANPEC reserves the right to make changes to improve reliability or manufacturability without notice, and
advise customers to obtain the latest version of relevant information to verify before placing orders.
Copyright ANPEC Electronics Corp.
Rev. A.3 - Oct., 2003
1
www.anpec.com.tw
1 page APW7057
Electrical Characteristics (Cont.)
Unless otherwise specified, these specifications apply over VCC=5V, VBOOT=12V and TA= 0~70 oC. Typical
values are at TA=25oC.
Symbol
Parameter
Test Conditions
PWM CONTROLLER GATE DRIVERS
UGATE Source
VUAGTE=1V
UGATE Sink
VUGATE=1V
LGATE Source
VLGATE=1V
LGATE Sink
VLGATE=1V
TD Dead Time
PROTECTION
IOCSET OCSET Sink Current
VOCSET=4.5V
UVFB FB Under-Voltage Level FB falling
FB Under-Voltage
Hysteresis
SOFT-START AND SHUTDOWN
TSS Soft-Start Interval
Shutdown Threshold
VOCSET Falling
OCSET Shutdown
Hysteresis
APW7057
Unit
Min Typ Max
0.6 A
7.3 Ω
0.6 A
1.8 Ω
50 nS
34 40 46
0.5
15
µA
V
mV
2
1.25
20
mS
V
mV
Functional Pin Description
BOOT (Pin 1)
This pin provides the supply voltage to the high side
MOSFET driver. A voltage no greater than 13V can
be connected to this pin as a supply to the driver.
For driving logic level N-channel MOSEFT, a boot-
strap circuit can be use to create a suitable driver’s
supply.
UGATE (Pin 2)
This pin provides gate drive for the high-side
MOSFET.
LGATE (Pin 4)
This pin provides the gate drive signal for the low
side MOSFET.
VCC (Pin 5)
This is the main bias supply for the controller and
its low side MOSFET driver. Must be closely
decoupled to GND (Pin 3). DO NOT apply a
voltage greater than 5.5V to this pin.
GND (Pin 3)
Signal and power ground for the IC. All voltage lev-
els are measured with respect to this pin. Tie this
pin to the ground plane through the lowest imped-
ance connection available.
FB (Pin 6)
This pin is the inverting input of the error amplifier
and it receives the feedback voltage from an exter-
Copyright ANPEC Electronics Corp.
Rev. A.3 - Oct., 2003
5
www.anpec.com.tw
5 Page APW7057
Packaging Information
SOP-8 pin ( Reference JEDEC Registration MS-012)
EH
e1
D
e2
0.004max.
A1 A
1
L
Dim
A
A1
D
E
H
L
e1
e2
φ1
Millimeters
Min.
Max.
1.35
1.75
0.10
0.25
4.80
5.00
3.80
4.00
5.80
6.20
0.40
1.27
0.33
0.51
1.27BSC
8°
Min.
0.053
0.004
0.189
0.150
0.228
0.016
0.013
Inches
0.50BSC
8°
Max.
0.069
0.010
0.197
0.157
0.244
0.050
0.020
Copyright ANPEC Electronics Corp.
Rev. A.3 - Oct., 2003
11
www.anpec.com.tw
11 Page |
Páginas | Total 14 Páginas | |
PDF Descargar | [ Datasheet APW7057.PDF ] |
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