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PDF PT6315 Data sheet ( Hoja de datos )

Número de pieza PT6315
Descripción VFD Driver/Controller IC
Fabricantes Princeton Technology Corp 
Logotipo Princeton Technology Corp Logotipo



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No Preview Available ! PT6315 Hoja de datos, Descripción, Manual

VFD Driver/Controller IC
Tel : 886-2-29162151
Fax: 886-2-29174598
PT6315
DESCRIPTION
PT6315 is a Vacuum Fluorescent Display (VFD) Controller driven on a 1/4 to 1/12 duty factor. Sixteen
segment output lines, 4 grid output lines, 8 segment/grid output drive lines, one display memory, control circuit,
key scan circuit are all incorporated into a single chip to build a highly reliable peripheral device for a single chip
micro computer. Serial data is fed to PT6315 via a three-line serial interface. It is housed in a 44-pin, SSOP
and LQFP Package.
FEATURES
• CMOS Technology
• Low Power Consumption
• Key Scanning (16 x 2 matrix)
• Multiple Display Modes: (16 segments, 12 digits to 24 segments, 4 digits)
• 8-Step Dimming Circuitry
• LED Ports Provided (4 channels, 20 mA max.)
• Serial Interface for Clock, Data Input, Data Output, Strobe Pins
• No External Resistors Needed for Driver Outputs
• Available in 44-pin, SSOP and LQFP Package
APPLICATION
• Microcomputer Peripheral Device
PT6315 v2.0
Page 1
Sep. 2002

1 page




PT6315 pdf
VFD Driver/Controller IC
PIN DESCRIPTION
Tel : 886-2-29162151
Fax: 886-2-29174598
PT6315
Pin Name
I/O
Description
Pin No.
LED1 to LED4
O
LED Output Pin
1 to 4
OSC
Oscillator Input Pin
I A resistor is connected to this pin to
determine the oscillation frequency
5
DOUT
Data Output Pin (N-Channel, Open-Drain)
O
This pin outputs serial data at the falling
edge of the shift clock (starting from the
lower bit).
6
DIN
(Schmitt Trigger)
Data Input Pin
I
This pin inputs serial data at the rising edge
of the shift clock (starting from the lower
bit)
7
CLK
(Schmitt Trigger)
Clock Input Pin
I This pin reads serial data at the rising edge
and outputs data at the falling edge.
8
STB
(Schmitt Trigger)
Serial Interface Strobe Pin
I
The data input after the STB has fallen is
processed as a command.
9
When this pin is "HIGH", CLK is ignored.
K1 to K2
Key Data Input Pins
I The data inputted to these pins are latched 10 ,11
at the end of the display cycle.
VSS -
Logic Ground Pin
12,44
VDD
-
Logic Power Supply
13,43
SG1/KS1 to SG16/KS16 O
High-Voltage Segment Output Pins
Also acts as the Key Source
14 to
29
VEE
-
Pull-Down Level
30
SG17/GR12 to SG24/GR5 O
High Voltage Segment/Grid Output Pins
31 to
38
GR4 to GR1
O
High-Voltage Grid Output Pins
39 to
42
PT6315 v2.0
Page 5
Sep. 2002

5 Page





PT6315 arduino
VFD Driver/Controller IC
Tel : 886-2-29162151
Fax: 886-2-29174598
PT6315
COMMAND 3: ADDRESS SETTING COMMANDS
Address Setting Commands are used to set the address of the display memory. The address is
considered valid if it has a value of “00H” to “23H”. If the address is set to 24H or higher, the
data is ignored until a valid address is set. When power is turned ON, the address is set at “00H”.
Please refer to the diagram below.
MSB
LSB
1 1 b5 b4 b3 b2 b1 b0
Address: 00H to 23H
Figure 10: Address Settings
PT6315 v2.0
Page 11
Sep. 2002

11 Page







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