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PDF TQ8025 Data sheet ( Hoja de datos )
| Número de pieza | TQ8025 | |
| Descripción | 2.5 Gigabit/sec 16x16 Digital Crosspoint Switch | |
| Fabricantes | TriQuint Semiconductor | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de TQ8025 (archivo pdf) en la parte inferior de esta página. Total 10 Páginas | ||
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TRIQUINT
S E M I C O N D U C T O R, I N C .
32
DIØ–15
(differential)
PECL/CML
Input
Buffers
16 x 16
Crosspoint
Switch Matrix
PECL/CML
Output
Buffers
32
DOØ–15
(differential)
RESET–
LDMODE
CONFIG
16 x 4
Configuration
Latches
READY
TQ8025
PRELIMINARY DATA SHEET
2.5 Gigabit/sec
16x16 Digital
Crosspoint Switch
ADD15
ADDØ
LOAD
CLOCK
ADDREN
AUTOCONFIG
TQ8025
4-Bit Shift
Register
4-Bit Shift
Register
Address Generator
and Control
+5V
GND
RADDØ
RADD1
The TQ8025 is a non-blocking 16 x 16 digital crosspoint switch capable of
data rates greater than 2.5 gigabits per second per port. With a fully
differential internal data path and PECL/CML I/O, the TQ8025 offers an
extremely high data rate with exceptional signal fidelity. The use of fully
differential logic results in low crosstalk, jitter, and signal skew. The
TQ8025 is ideally suited for digital video, data communications,
telecommunication switching, and cross-connect applications.
The non-blocking architecture uses 16 fully independent 16:1 multiplexers
which allow each output port to be independently programmed to any input
port. The TQ8025 offers two programming options: a flexible port-by-port
option, and a fast configuration option.
Features
• 16 PECL/CML fully differential
(back-terminated) outputs
• >2.5 Gb/s data bandwidth
per channel
• >40 Gb/s aggregate bandwidth
• Non-blocking architecture
• 80 ns configuration time
• Autonomous control of external
RAM for configuration data
• Low jitter and signal skew
• ±100 ps delay match (one input
to all outputs)
• Fully differential data path
• 132-pin MLC package with
heat spreader
Using the fast configuration option, all 16 switch ports are programmed
within 80ns by serially loading four 16-bit input port selection words. Two
output pins (RADD0,1) are provided to drive an external RAM
(n x 4 x 16 bits) used to store the switch configuration. An Autoconfigure
option automatically transfers the new configurations into the switch core.
Autoconfiguration occurs after the last input selection word is clocked into
the programming registers.
Data integrity is maintained on all unchanged data paths for both the port-
by-port and fast configuration options.
Applications
• SONET OC-48 data path
• Double-speed Fibre Channel
• Hubs and routers
• High-definition video switching
• Parallel processing
For additional information and latest specifications, see our website: www.triquint.com
1
1 page  
TQ8025
PRELIMINARY DATA SHEET
Table 8. TQ8025 Timing — RAM Loading, Auto-Configure Mode 1
Symbol
T1
T2
T3
T4
T5
T6
T7
T8
T9
T10
T11
T12
T13
T14
T15
Parameter
LOAD high to READY low
CLOCK low to READY high
ADDREN low to RADD enabled
Setup LOAD high to CLOCK high
CLOCK low to RADD increment
AD0:15 setup before CLOCK low
AD0:15 hold time after CLOCK low
CLOCK low to INT CONFIGURE high
CONFIGURE low pulse width
ADDREN high to RADD tristate
LOAD low prior to 3rd CLOCK low
LOAD high pulse
CLOCK low to SIGNAL PATHS updated
CLOCK period
LOAD high to INT CONFIGURE low
Notes: 1. LDMODE = 1; AUTOCONFIG = 1, RESET– = 1, CONFIG = 1.
Min.
3
3
3
4
2
0
2
2
10
3
4
TBD
4
20
TBD
Max.
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Figure 2. TQ8025 Timing —␣ RAM Loading, Auto-Configure Mode
CLOCK
LOAD
ADDREN
RADD0:1
READY
AD0:15
INT CONFIGURE
SIGNAL PATHS
T4
T12
T3
0
T1
T6
D0
T15
T14
T11
T5
1
2
T7
D1
D2
OLD CONFIGURATION
3
T2
D3
T8
T13
LDMODE = 1; AUTOCONFIG = 0, RESET– = 1.
Note: INT CONFIGURE is an internal signal shown for clarity of operation.
T10
0
T1
T15
T9
NEW CONFIGURATION
For additional information and latest specifications, see our website: www.triquint.com
5
5 Page | ||
| Páginas | Total 10 Páginas | |
| PDF Descargar | [ Datasheet TQ8025.PDF ] | |
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