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PDF DS90LV032ATMTC Data sheet ( Hoja de datos )
| Número de pieza | DS90LV032ATMTC | |
| Descripción | 3V LVDS Quad CMOS Differential Line Receiver | |
| Fabricantes | National Semiconductor | |
| Logotipo |  |
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July 1999
DS90LV032A
3V LVDS Quad CMOS Differential Line Receiver
General Description
The DS90LV032A is a quad CMOS differential line receiver
designed for applications requiring ultra low power dissipa-
tion and high data rates. The device is designed to support
data rates in excess of 400 Mbps (200 MHz) utilizing Low
Voltage Differential Signaling (LVDS) technology.
The DS90LV032A accepts low voltage (350 mV typical) dif-
ferential input signals and translates them to 3V CMOS out-
put levels. The receiver supports a TRI-STATE® function that
may be used to multiplex outputs. The receiver also supports
open, shorted and terminated (100Ω) input Fail-safe. The re-
ceiver output will be HIGH for all fail-safe conditions.
The DS90LV032A and companion LVDS line driver (eg.
DS90LV031A) provide a new alternative to high power
PECL/ECL devices for high speed point-to-point interface
applications.
Features
n >400 Mbps (200 MHz) switching rates
n 0.1 ns channel-to-channel skew (typical)
n 0.1 ns differential skew (typical)
n 3.3 ns maximum propagation delay
n 3.3V power supply design
n Power down high impedance on LVDS inputs
n Low Power design (40mW 3.3V static)
n Interoperable with existing 5V LVDS networks
n Accepts small swing (350 mV typical) VID
n Supports open, short and terminated input fail-safe
n Compatible with ANSI/TIA/EIA-644
n Industrial temp. operating range (-40˚C to +85˚C)
n Available in SOIC and TSSOP Packaging
Connection Diagram
Dual-in-Line
Functional Diagram
DS100067-1
Order Number DS90LV032ATM
or DS90LV032ATMTC
See NS Package Number M16A or MTC16
ENABLES
EN EN*
LH
All other combinations
of ENABLE inputs
INPUTS
RIN+ − RIN−
X
VID ≥ 0.1V
VID ≤ −0.1V
Full Fail-safe
OPEN/SHORT
or Terminated
OUTPUT
ROUT
Z
H
L
H
DS100067-2
© 1999 National Semiconductor Corporation DS100067
www.national.com
1 page  
Applications Information (Continued)
The DS90LV032A differential line receiver is capable of de-
tecting signals as low as 100 mV, over a ±1V common-mode
range centered around +1.2V. This is related to the driver off-
set voltage which is typically +1.2V. The driven signal is cen-
tered around this voltage and may shift ±1V around this cen-
ter point. The ±1V shifting may be the result of a ground
potential difference between the driver’s ground reference
and the receiver’s ground reference, the common-mode ef-
fects of coupled noise, or a combination of the two. Both re-
ceiver input pins have a recommended operating input volt-
age range of 0V to +2.4V (measured from each pin to
ground), exceeding these limits may turn on the ESD protec-
tion circuitry which will clamp the bus voltages.
Power Decoupling Recommendations:
Bypass capacitors must be used on power pins. High fre-
quency ceramic (surface mount is recommended) 0.1µF in
parallel with 0.01µF, in parallel with 0.001µF at the power
supply pin as well as scattered capacitors over the printed
circuit board. Multiple vias should be used to connect the de-
coupling capacitors to the power planes A 10µF (35V) or
greater solid tantalum capacitor should be connected at the
power entry point on the printed circuit board.
PC Board considerations:
Use at least 4 PCB layers (top to bottom); LVDS signals,
ground, power, TTL signals.
Isolate TTL signals from LVDS signals, otherwise the TTL
may couple onto the LVDS lines. It is best to put TTL and
LVDS signals on different layers which are isolated by a
power/ground plane(s).
Keep drivers and receivers as close to the (LVDS port side)
connectors as possible.
Differential Traces:
Use controlled impedance traces which match the differen-
tial impedance of your transmission medium (ie. cable) and
termination resistor. Run the differential pair trace lines as
close together as possible as soon as they leave the IC
(stubs should be < 10mm long). This will help eliminate re-
flections and ensure noise is coupled as common-mode. In
fact, we have seen that differential signals which are 1mm
apart radiate far less noise than traces 3mm apart since
magnetic field cancellation is much better with the closer
traces. Plus, noise induced on the differential lines is much
more likely to appear as common-mode which is rejected by
the receiver.
Match electrical lengths between traces to reduce skew.
Skew between the signals of a pair means a phase differ-
ence between signals which destroys the magnetic field can-
cellation benefits of differential signals and EMI will result.
(Note the velocity of propagation, v = c/Er where c (the
speed of light) = 0.2997mm/ps or 0.0118 in/ps). Do not rely
solely on the autoroute function for differential traces. Care-
fully review dimensions to match differential impedance and
provide isolation for the differential lines. Minimize the num-
ber or vias and other discontinuities on the line.
Avoid 90˚ turns (these cause impedance discontinuities).
Use arcs or 45˚ bevels.
Within a pair of traces, the distance between the two traces
should be minimized to maintain common-mode rejection of
the receivers. On the printed circuit board, this distance
should remain constant to avoid discontinuities in differential
impedance. Minor violations at connection points are allow-
able.
Termination:
Use a resistor which best matches the differential impedance
or your transmission line. The resistor should be between
90Ω and 130Ω. Remember that the current mode outputs
need the termination resistor to generate the differential volt-
age. LVDS will not work without resistor termination. Typi-
cally, connect a single resistor across the pair at the receiver
end.
Surface mount 1% to 2% resistors are best. PCB stubs,
component lead, and the distance from the termination to the
receiver inputs should be minimized. The distance between
the termination resistor and the receiver should be <10mm
(12mm MAX)
Probing LVDS Transmission Lines:
Always use high impedance (> 100kΩ), low capacitance
(< 2 pF) scope probes with a wide bandwidth (1 GHz)
scope. Improper probing will give deceiving results.
Cables and Connectors, General Comments:
When choosing cable and connectors for LVDS it is impor-
tant to remember:
Use controlled impedance media. The cables and connec-
tors you use should have a matched differential impedance
of about 100Ω. They should not introduce major impedance
discontinuities.
Balanced cables (e.g. twisted pair) are usually better than
unbalanced cables (ribbon cable, simple coax.) for noise re-
duction and signal quality. Balanced cables tend to generate
less EMI due to field canceling effects and also tend to pick
up electromagnetic radiation a common-mode (not differen-
tial mode) noise which is rejected by the receiver. For cable
distances < 0.5M, most cables can be made to work effec-
tively. For distances 0.5M ≤ d ≤ 10M, CAT 3 (category 3)
twisted pair cable works well, is readily available and rela-
tively inexpensive.
Fail-Safe Feature:
The LVDS receiver is a high gain, high speed device that
amplifies a small differential signal (20mV) to CMOS logic
levels. Due to the high gain and tight threshold of the re-
ceiver, care should be taken to prevent noise from appearing
as a valid signal.
The receiver’s internal fail-safe circuitry is designed to
source/sink a small amount of current, providing fail-safe
protection (a stable known state of HIGH output voltage) for
floating, terminated or shorted receiver inputs.
1. Open Input Pins. The DS90LV032A is a quad receiver
device, and if an application requires only 1, 2 or 3 re-
ceivers, the unused channel(s) inputs should be left
OPEN. Do not tie unused receiver inputs to ground or
any other voltages. The input is biased by internal high
value pull up and pull down resistors to set the output to
a HIGH state. This internal circuitry will guarantee a
HIGH, stable output state for open inputs.
2. Terminated Input. If the driver is disconnected (cable
unplugged), or if the driver is in a TRI-STATE or power-
off condition, the receiver output will again be in a HIGH
state, even with the end of cable 100Ω termination resis-
tor across the input pins. The unplugged cable can be-
come a floating antenna which can pick up noise. If the
cable picks up more than 10mV of differential noise, the
receiver may see the noise as a valid signal and switch.
To insure that any noise is seen as common-mode and
not differential, a balanced interconnect should be used.
Twisted pair cable will offer better balance than flat rib-
bon cable.
5 www.national.com
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