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PDF CXG1121TN Data sheet ( Hoja de datos )
| Número de pieza | CXG1121TN | |
| Descripción | SP4T GSM/GPRS Dual-Band Antenna Switch + Logic | |
| Fabricantes | Sony Corporation | |
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CXG1121TN
SP4T GSM/GPRS Dual-Band Antenna Switch + Logic
Description
The CXG1121TN is one of a range of low insertion
loss, high power MMIC antenna switches for GSM/
GPRS dual-band application. The low insertion loss
on transmit means increased talk time as the Tx
power amplifier can be operated at a lower output
level. On-chip logic reduces component count and
simplifies PWB layout by allowing direct connection
of the switch to digital base band control lines with
CMOS logic levels.
This switch is an SP4T, one antenna can be routed
to either of the 2 Tx or 2 Rx ports. It requires 3 CMOS
control lines (Tx/Rx, GSM900/1800 and Standby).
The Sony GaAs JFET process is used for low
insetion loss. An evaluation PWB is available.
16 pin TSSOP (Plastic)
Features
• Insertion loss (Tx) 0.5dB typical at 34dBm (GSM900)
• 3 CMOS compatible control lines
• Low second harmonic, –40dBm typical, at 34dBm (GSM900)
• Small package size: 16-pin TSSOP (3.9mm × 4.1mm × 1.2mm)
Applications
• Dual-band handsets using combinations of GSM900/GSM1800/GSM1900
• GPRS class 12 handsets
Structure
GaAs J-FET MMIC
Absolute Maximum Ratings (Ta = 25°C)
• Bias voltage
VDD
7
• Control voltage
VCTL
5
• Operating temperature Topr –20 to +80
V
V
°C
GaAs MMICs are ESD sensitive devices. Special handling precautions are required. The IC will be damaged in
the range from 100 to 200V @200pF 0Ω and below 1000V @100pF 1500Ω.
Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by
any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the
operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits.
–1–
E01661-PS
1 page  
Application Note (1)
Operating from Regulated Supplies between 3V and 2.7V
Logic Lines
CXG1121TN
8 Tx1
6 Tx2
ANT
CXG1121TN 11
4 Rx1
2 Rx2
13
VDD
Additional components
C: 0603 CAP µF∗2
R: 200R
D: Low Turn-on voltage diode
∗1
Timeslot
waveform
VDD between
5.7V and 4.5V
during Tx
C
D
R
Regulated supply
between 3V and 2.7V
Technique
Allows use of CXG1121TN SP4T in handsets with regulated supplies between 3V and 2.7V.
The CXG1121TN is for 5V nominal battery voltage but works well down to a VDD of 4.5V.
This technique is only necessary for Tx modes.
Fundamentally, the timeslot waveform is added to the supply voltage to give a VDD between 5.7V and 4.5V
(depending on supply) during Tx modes.
This technique is suitable for up to 4 consecutive Tx timeslots (i.e.GPRS Class 12).
∗1 This waveform may be taken from the PA ramping input (or drain supply in case of drain power control) or
via the Tx ON/OFF logic.
∗2 Minimum and recommended value of capacitance C depends on GPRS class and is given by the following
table.
Number of consecutive
Tx timeslots
1
2
4
Minimum and recommended
value of capacitance C (µF)
1.0
2.0
2.0
–5–
5 Page | ||
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| PDF Descargar | [ Datasheet CXG1121TN.PDF ] | |
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