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PDF CY7C9235-270JC Data sheet ( Hoja de datos )
| Número de pieza | CY7C9235-270JC | |
| Descripción | SMPTE-259M/DVB-ASI Scrambler/Controller | |
| Fabricantes | Cypress Semiconductor | |
| Logotipo |  |
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PRELIMINARY
CY7C9235
Features
• Fully compatible with SMPTE-259M
— SMPTE-125M compliant for 4:2:2 component video
— SMPTE-244M compliant for 4fsc composite video
• Fully compatible with DVB-ASI
• Operates from a single +5V or –5V supply
• 44-pin PLCC package
• Encodes both 8- and 10-bit parallel digital streams for
any rate from 16–40 M characters/sec (160–400
Mbits/sec serial)
• Operates with CY7B9234 SMPTE HOTLink™ serializ-
er/transmitter
• X9 + X4 + 1 scrambler and NRZI encoder may be by-
passed for raw data output
Functional Description
SMPTE-259M Operation
The CY7C9235 is a CMOS integrated circuit designed to en-
code SMPTE-125M and SMPTE-244M bit-parallel digital char-
acters (or other data formats) using the SMPTE-259M encod-
ing rules. Following encoding, the characters are output as
bit-parallel characters ready for serialization. The encoded
outputs of the CY7C9235 are designed to be directly mated to
Logic Block Diagram
SMPTE-259M/DVB-ASI
Scrambler/Controller
a CY7B9234 HOTLink transmitter, which then converts the
bit-parallel characters into a SMPTE-259M compatible
high-speed serial data stream.
This device performs both TRS (sync) detection and filtering,
data scrambling with the SMPTE-259M X9 + X4 + 1 algorithm,
and NRZ-to-NRZI encoding. These functions operate at any
character rate from 16- to 40 MHz. For those systems operat-
ing with non-SMPTE-259M compliant video streams (or for di-
agnostic purposes), the scrambler and NRZI encoding func-
tions can be disabled.
DVB-ASI Operation
The CY7C9235 also contains the necessary multiplexers, con-
trol inputs, and outputs, to sequence out a DVB-ASI compliant
video stream. DVB-ASI operation is enabled through activation
of a single input signal. This allows a single serial output port
to support both SMPTE and DVB data streams under software
or hardware control.
In DVB-ASI mode the CY7C9235 operates with two enable
signals (ENA and ENN) to allow data to be presented from
either synchronous (clocked) or asynchronous FIFOs. When
data is not available, the CY7C9235 ensures that the proper
fill character (K28.5) is generated by the attached CY7B9234
serializer.
The CY7C9235 operates from a single +5V or −5V supply. It is
available in a 44-pin PLCC space saving package.
PD 9(SVS)
PD 8
PD 7
PD 6
PD 5
PD 4
PD 3
PD 2
PD 1
PD 0(SC/D)
TRS_FILT
SC/D_EN
SVS_EN
BYPASS
DVB_EN
ENA
ENN
CKW
OE
10 10 10
10 10
TRS_DET
Q 9(SVS)
Q8
Q7
Q6
Q5
Q4
Q3
Q2
Q1
Q 0(SC/D)
ENA_OUT
Cypress Semiconductor Corporation • 3901 North First Street • San Jose • CA 95134 • 408-943-2600
March 19, 1999
1 page  
PRELIMINARY
CY7C9235
using the ENA and ENN inputs, or by placing a C5.0 character
on the PD9–0 inputs when one of the two enables is active.
If the generation of K28.5 fill characters is to be controlled
using the ENA or ENN inputs, the SC/D_EN input should be
driven LOW or connected to VSS. This will insure that the PD0
data bit is not routed to the output register by forcing the Q0
output to always be LOW.
If the generation of a K28.5 characters is controlled by trans-
mission of a C5.0 character, the SC/D_EN input must be HIGH
to allow the PD0 input to be propagated to the Q0 output.
Electrical Characteristics Over the Operating Range
Parameter
Description
VOH Output HIGH Voltage
VOL Output LOW Voltage
VIH Input HIGH Voltage
VIL Input LOW Voltage
IIX Input Load Current
IOZ Output Leakage Current
IOS Output Short Circuit Current[2,3]
ICC Power Supply Current
Test Conditions
VCC=Min., IOH = −3.2 mA
VCC=Min., IOL = 16.0 mA
Guaranteed Input Logical HIGH
Voltage for all Inputs[1]
Guaranteed Input Logical HIGH
Voltage for all Inputs[1]
VI = VCC or VSS
VO = VCC or VSS
VCC = Max., VOUT = 0.5V
VIN, VI/O = VCC or VSS
Min.
2.4
2.0
–0.5
−10
−50
−10
Max.
0.5
7.0
0.8
+10
+50
− 80
Unit
V
V
V
V
µA
µA
mA
mA
Capacitance[3]
Parameter
Description
Test Conditions
Max.
Unit
CIN
Input Capacitance
VIN = 5.0V at f = 1 MHz
10 pF
COUT
Output Capacitance
VOUT = 5.0V at f = 1 MHz
12
pF
Notes:
1. These are absolute values with respect to device ground. All overshoots due to system or tester noise are included.
2. Not more than one output should be tested at a time. Duration of the short circuit should not exceed 1 second. VOUT = 0.5V has been chosen to avoid test
problems caused by tester ground degradation.
3. Tested initially and after any design or process changes that may affect these parameters.
5
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