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PDF LTC1556IGN Data sheet ( Hoja de datos )

Número de pieza LTC1556IGN
Descripción SIM Power Supply and Level Translator
Fabricantes Linear Technology 
Logotipo Linear Technology Logotipo



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LTC1555/LTC1556
SIM Power Supply
and Level Translator
FEATURES
s Step-Up/Step-Down Charge Pump Generates 5V
s Input Voltage Range: 2.7V to 10V
s Output Current: 10mA (VIN 2.7V)
20mA (VIN 3V)
s 3V to 5V Signal Level Translators
s > 10kV ESD on All SIM Contact Pins
s Short-Circuit and Overtemperature Protected
s Very Low Operating Current: 60µA
s Very Low Shutdown Current: < 1µA
s Soft Start Limits Inrush Current at Turn-On
s Programmable 3V or 5V Output Voltage
s 650kHz Switching Frequency
s Auxiliary 4.3V LDO/Power Switch (LTC1556 Only)
s Available in a 16- and 20-Pin Narrow SSOP
U
APPLICATIONS
s SIM Interface in GSM Cellular Telephones
s Smart Card Readers
DESCRIPTION
The LTC®1555/LTC1556 provide power conversion and
level shifting needed for 3V GSM cellular telephones to
interface with either 3V or 5V Subscriber Identity Mod-
ules (SIMs). These parts contain a charge pump DC/DC
converter that delivers a regulated 5V to the SIM card.
Input voltage may range from 2.7V to 10V, allowing
direct connection to the battery. Output voltage may be
programmed to 3V, 5V or direct connection to the VIN pin.
A soft start feature limits inrush current at turn-on,
mitigating start-up problems that may result when the
input is supplied by another low power DC/DC converter.
The LTC1556 also includes an auxiliary LDO regulator/
power switch that may be used to power the frequency
synthesizer or other low power circuitry.
Battery life is maximized by 60µA operating current and
1µA shutdown current. Board area is minimized by minia-
ture 16- and 20-pin narrow SSOP packages and the need
for only three small external capacitors.
, LTC and LT are registered trademarks of Linear Technology Corporation.
TYPICAL APPLICATION
GSM Cellular Telephone SIM Interface
3V GSM
CONTROLLER
VCC
3V LTC1555
1
CIN
2
RIN
3
DATA
4
DDRV
5
DVCC
6
SS
7
M1
8
M0
16
CLK
15
RST
14
I/O
13
VCC
12
VIN
C1+ 11
C110
9
GND
VIN
2.7V TO 10V
+
0.1µF
10µF
SIM
10µF
CLK
RST
I/O
VCC
5V ± 5%
IVCC 10mA
GND
1555/56 TA01
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LTC1556IGN pdf
LTC1555/LTC1556
PIN FUNCTIONS
LTC1555/LTC1556
CIN (Pin 1): Clock Input Pin from Controller.
RIN (Pin 2): Reset Input Pin from Controller.
DATA (Pin 3): Controller Side Data Input/Output Pin. Can
be used for single pin bidirectional data transfer between
the controller and the SIM card as long as the controller
data pin is open drain. The controller output must be able
to sink 1mA max when driving the DATA pin low due to
the internal pull-up resistors on the DATA and I/O pins. If
the controller data output is not open drain, then the
DDRV pin should be used for sending data to the SIM
card and the DATA pin used for receiving data from the
SIM card (see Figure 1).
DDRV (Pin 4): Optional Data Input Pin for Sending Data
to the SIM card. When not needed, the DDRV pin should
be left floating or tied to DVCC (an internal 1µA current
source will pull the DDRV pin up to DVCC if left floating).
DVCC (Pins 5/7): Supply Voltage for Controller Side Digital
I/O Pins. May be between 1.8V and 5.5V (typically 3V).
SS (Pins 6/8): Soft Start Enable Pin. A logic low will
enable the charge pump inrush current limiting feature.
A logic high will disable the soft start feature and allow
VCC to be ramped as quickly as possible upon start-up
and coming out of shutdown.
M1 (Pins 7/9): Mode Control Bit 1 (see Truth Table).
M0 (Pins 8/10): Mode Control Bit 0 (see Truth Table).
This table defines the various operating modes that may
be obtained via the M0 and M1 mode control pins.
Truth Table
M0
0V
0V
DVCC
DVCC
M1
0V
DVCC
0V
DVCC
MODE
Shutdown (VCC = 0V)
VCC = VIN
VCC = 3V
VCC = 5V
GND (Pins 9/11, 12): Ground for Both the SIM and the
Controller. Should be connected to the SIM GND contact
as well as to the VIN/Controller GND. Proper grounding
and supply bypassing is required to meet 10kV ESD
specifications.
C1(Pins 10/12): Charge Pump Flying Capacitor Nega-
tive Input.
C1+ (Pins 11/13): Charge Pump Flying Capacitor Positive
Input.
VIN (Pins 12/14): Charge Pump Input Voltage Pin. Input
voltage range is 2.7V to 10V. Connect a 10µF low ESR
input bypass capacitor close to the VIN pin.
VCC (Pins 13/15): SIM Card VCC Output. This pin should
be connected to the SIM VCC contact. The VCC output
voltage is determined by the M0 and M1 pins (see Truth
Table). VCC is discharged to GND during shutdown
(M0, M1 = 0V). A 10µF low ESR output capacitor should
connect close to the VCC pin.
I/O (Pins 14/18): SIM Side I/O Pin. The pin is an open
drain output with a nominal pull-up resistance of 10k and
should be connected to the SIM I/O contact. The SIM card
must sink up to 1mA max when driving the I/O pin low
due to the internal pull-up resistors on the I/O and DATA
pins. The I/O pin is held active low when the part is in
shutdown.
RST (Pins 15/19): Level Shifted Reset Output Pin. Should
be connected to the SIM RST contact.
CLK (Pins 16/20): Level Shifted Clock Output Pin. Should
be connected to the SIM CLK contact. Careful trace
routing is recommended due to fast rise and fall edge
speeds.
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LTC1556IGN arduino
LTC1555/LTC1556
PACKAGE DESCRIPTION Dimensions in inches (millimeters) unless otherwise noted.
GN Package
20-Lead Plastic SSOP (Narrow 0.150)
(LTC DWG # 05-08-1641)
0.337 – 0.344*
(8.560 – 8.737)
20 19 18 17 16 15 14 13 12 11
0.229 – 0.244
(5.817 – 6.198)
0.150 – 0.157**
(3.810 – 3.988)
0.007 – 0.0098
(0.178 – 0.249)
0.015
(0.38
±
±
0.004
0.10)
×
45°
0° – 8° TYP
0.016 – 0.050
(0.406 – 1.270)
* DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH
SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE
** DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD
FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE
1 2 3 4 5 6 7 8 9 10
0.053 – 0.068
(1.351 – 1.727)
0.004 – 0.0098
(0.102 – 0.249)
0.008 – 0.012
(0.203 – 0.305)
0.025
(0.635)
BSC
GN20 (SSOP) 1197
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-
tation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
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