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PDF LTC1546C Data sheet ( Hoja de datos )
| Número de pieza | LTC1546C | |
| Descripción | Software-Selectable Multiprotocol Transceiver with Termination | |
| Fabricantes | Linear Technology | |
| Logotipo |  |
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FEATURES
s Software-Selectable Transceiver Supports:
RS232, RS449, EIA530, EIA530-A, V.35, V.36, X.21
s TUV Telecom Services Inc. Certified NET1,
NET2 and TBR2 Compliant
s On-Chip Cable Termination
s Pin Compatible with LTC1543
s Complete DTE or DCE Port with LTC1544
s Operates from Single 5V Supply
s Small Footprint
U
APPLICATIO S
s Data Networking
s CSU and DSU
s Data Routers
Final Electrical Specifications
LTC1546
Software-Selectable
Multiprotocol Transceiver
with Termination
December 1999
DESCRIPTIO
The LTC®1546 is a 3-driver/3-receiver multiprotocol trans-
ceiver with on-chip cable termination. When combined with
the LTC1544, this chip set forms a complete software-
selectable DTE or DCE interface port that supports the
RS232, RS449, EIA530, EIA530-A, V.35, V.36 and X.21
protocols. All necessary cable termination is provided inside
the LTC1546. In most applications, the LTC1546 replaces
both an LTC1543 and an LTC1344A without any changes to
the PC board.
The LTC1546 runs from a single 5V supply using an internal
charge pump that requires only five space-saving surface
mounted capacitors. The LTC1546 is available in a 28-lead
SSOP surface mount package.
, LTC and LT are registered trademarks of Linear Technology Corporation.
TYPICAL APPLICATIO
Complete DTE or DCE Multiprotocol Serial Interface with DB-25 Connector
LL CTS DSR
DCD DTR RTS
RXD RXC
TXC SCTE TXD
LTC1544
D4
R4 R3 R2 R1
D3 D2 D1
LTC1546
D3 D2 D1
R3 R2 R1
TT
TTT
18 13 5 10 8
22 6 23 20 19 4 1 7 16 3 9 17
12 15 11 24 14 2
DB-25 CONNECTOR
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-
tation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
1546 TA01
1
1 page  
LTC1546
PI FU CTIO S
C1–␣ (Pin 1): Capacitor C1 Negative Terminal. Connect a
1µF capacitor between C1+ and C1–.
C1+ (Pin 2): Capacitor C1 Positive Terminal. Connect a
1µF capacitor between C1+ and C1 –.
VDD (Pin 3): Generated Positive Supply Voltage for
V.28. Connect a 1µF capacitor to ground.
VCC (Pin 4): Positive Supply Voltage Input. 4.75V ≤ VCC
≤ 5.25V. Bypass with a 1µF capacitor to ground.
D1 (Pin 5): TTL Level Driver 1 Input.
D2 (Pin 6): TTL Level Driver 2 Input.
D3 (Pin 7): TTL Level Driver 3 Input.
R1 (Pin 8): CMOS Level Receiver 1 Output.
R2 (Pin 9): CMOS Level Receiver 2 Output.
R3 (Pin 10): CMOS Level Receiver 3 Output.
M0 (Pin 11): TTL Level Mode Select Input 0 with Pull-Up
to VCC. See Table 1.
M1 (Pin 12): TTL Level Mode Select Input 1 with Pull-Up
to VCC. See Table 1.
M2 (Pin 13): TTL Level Mode Select Input 2 with Pull-Up
to VCC. See Table 1.
DCE/DTE (Pin 14): TTL Level Mode Select Input with Pull-
Up to VCC. See Table 1.
R3 B (Pin 15): Receiver 3 Noninverting Input.
R3 A (Pin 16): Receiver 3 Inverting Input.
R2 B (Pin 17): Receiver 2 Noninverting Input.
R2 A (Pin 18): Receiver 2 Inverting Input.
D3/R1 B (Pin 19): Receiver 1 Noninverting Input and
Driver 3 Noninverting Output.
D3/R1 A (Pin 20): Receiver 1 Inverting Input and Driver 3
Inverting Output.
D2 B (Pin 21): Driver 2 Noninverting Output.
D2 A (Pin 22): Driver 2 Inverting Output.
D1 B (Pin 23): Driver 1 Noninverting Output.
D1 A (Pin 24): Driver 1 Inverting Output.
GND (Pin 25): Ground.
VEE (Pin 26): Negative Supply Voltage. Connect a 3.3µF
capacitor to GND.
C2 – (Pin 27): Capacitor C2 Negative Terminal. Connect a
1µF capacitor between C2 + and C2 –.
C2 + (Pin 28): Capacitor C2 Positive Terminal. Connect a
1µF capacitor between C2+ and C2 –.
5
5 Page 
APPLICATIO S I FOR ATIO
(DATA)
11
M0
12
LTC1546 M1
13
M2
14
DCE/DTE
14
DCE/DTE
13
M2
LTC1544
12
M1
11
M0
(DATA)
CONNECTOR
NC
NC
LTC1546
CABLE
1546 F18
Figure 18: Single Port DCE V.35 Mode Selection in the Cable
V.10 (RS423) Interface
All V.10 drivers and receivers necessary for the RS449,
EIA530, EIA530-A, V.36 and X.21 protocols are imple-
mented on the LTC1544.
A typical V.10 unbalanced interface is shown in Figure 19.
A V.10 single-ended generator with output A and ground
C is connected to a differential receiver with input A' con-
nected to A, and ground C' connected via the signal return
to ground C. Usually, no cable termination is required for
V.10 interfaces, but the receiver inputs must be compliant
with the impedance curve shown in Figure 20.
The V.10 receiver configuration in the LTC1544 is shown
in Figure 21. In V.10 mode, switch S3 inside the LTC1544
is turned off. The noninverting input is disconnected
inside the LTC1544 receiver and connected to ground. The
cable termination is then the 30k input impedance to
ground of the LTC1544 V.10 receiver.
V.11 (RS422) Interface
A typical V.11 balanced interface is shown in Figure 22. A
V.11 differential generator with outputs A and B and
ground C is connected to a differential receiver with input
A' connected to A, input B' connected to B, and ground C'
connected via the signal return to ground C. The V.11
GENERATOR
BALANCED
INTERCONNECTING
CABLE
LOAD
CABLE
TERMINATION
RECEIVER
A A'
C C'
Figure 19. Typical V.10 Interface
1546 F19
IZ 3.25mA
–10V
–3V
3V
VZ
10V
–3.25mA
1546 F20
Figure 20. V.10 Receiver Input Impedance
11
11 Page | ||
| Páginas | Total 20 Páginas | |
| PDF Descargar | [ Datasheet LTC1546C.PDF ] | |
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