|
|
PDF MB85RC64A Data sheet ( Hoja de datos )
| Número de pieza | MB85RC64A | |
| Descripción | 64K (8K x 8) Bit I2C | |
| Fabricantes | Fujitsu | |
| Logotipo |  |
|
Hay una vista previa y un enlace de descarga de MB85RC64A (archivo pdf) en la parte inferior de esta página. Total 30 Páginas | ||
|
No Preview Available !
FUJITSU SEMICONDUCTOR
DATA SHEET
Memory FRAM
64 K (8 K × 8) Bit I2C
MB85RC64A
DS501-00019-2v0-E
■ DESCRIPTION
The MB85RC64A is an FRAM (Ferroelectric Random Access Memory) chip in a configuration of 8,192
words × 8 bits, using the ferroelectric process and silicon gate CMOS process technologies for forming the
nonvolatile memory cells.
Unlike SRAM, the MB85RC64A is able to retain data without using a data backup battery.
The read/write endurance of the nonvolatile memory cells used for the MB85RC64A has improved to be at
least 1012 cycles, significantly outperforming Flash memory and E2PROM in the number.
The MB85RC64A does not need a polling sequence after writing to the memory such as the case of Flash
memory or E2PROM.
■ FEATURES
• Bit configuration
: 8,192 words × 8 bits
• Two-wire serial interface
: Fully controllable by two ports: serial clock (SCL) and serial data (SDA).
• Operating frequency
: 1 MHz (Max)
• Read/write endurance
: 1012 times / byte
• Data retention
: 10 years ( + 85 °C), 95 years ( + 55 °C), over 200 years ( + 35 °C)
• Operating power supply voltage : 2.7 V to 3.6 V
• Low power consumption
: Operating power supply current 250 μA (Typ @1 MHz)
Standby current 5 μA (Typ)
• Operation ambient temperature range : − 40 °C to + 85 °C
• Package
: 8-pin plastic SOP (FPT-8P-M02)
RoHS compliant
Copyright©2012-2013 FUJITSU SEMICONDUCTOR LIMITED All rights reserved
2013.2
1 page  
MB85RC64A
■ ACKNOWLEDGE (ACK)
In the I2C bus, serial data including address or memory information is sent in units of 8 bits. The acknowledge
signal indicates that every 8 bits of the data is successfully sent and received. The receiver side usually
outputs the “L” level every time on the 9th SCL clock after each 8 bits are successfully transmitted and
received. On the transmitter side, the bus is temporarily released to Hi-Z every time on this 9th clock to allow
the acknowledge signal to be received and checked. During this Hi-Z-released period, the receiver side pulls
the SDA line down to indicate the “L” level that the previous 8 bits communication is successfully received.
In case the slave side receives Stop condition before sending or receiving the ACK “L” level, the slave side
stops the operation and enters to the standby state. On the other hand, the slave side releases the bus state
after sending or receiving the NACK “H” level. The master side generates Stop condition or Start condition
in this released bus state.
• Acknowledge timing overview diagram
SCL
123
89
SDA
Start
The transmitter side should always release SDA on the
9th bit. At this time, the receiver side outputs a pull-down if
the previous 8 bits data are received correctly (ACK re-
sponse).
ACK
DS501-00019-2v0-E
5
5 Page 
MB85RC64A
■ ABSOLUTE MAXIMUM RATINGS
Parameter
Symbol
Min
Power supply voltage*
VDD − 0.5
Input voltage*
Output voltage*
Operation ambient temperature
VIN
VOUT
TA
− 0.5
− 0.5
− 40
Storage temperature
Tstg
− 55
*: These parameters are based on the condition that VSS is 0 V.
Rating
Max
+4.0
VDD + 0.5 ( ≤ 4.0)
VDD + 0.5 ( ≤ 4.0)
+ 85
+ 125
Unit
V
V
V
°C
°C
WARNING: Semiconductor devices can be permanently damaged by application of stress (voltage, current,
temperature, etc.) in excess of absolute maximum ratings. Do not exceed these ratings.
■ RECOMMENDED OPERATING CONDITIONS
Parameter
Power supply voltage*
Symbol
VDD
Min
2.7
“H” level input voltage*
VIH VDD × 0.8
“L” level input voltage*
VIL − 0.5
Operation ambient temperature
TA
− 40
*: These parameters are based on the condition that VSS is 0 V.
Value
Typ
3.3
⎯
⎯
⎯
Max
3.6
VDD + 0.5
( ≤ 4.0)
+ 0.6
+ 85
Unit
V
V
V
°C
WARNING: The recommended operating conditions are required in order to ensure the normal operation of
the semiconductor device. All of the device's electrical characteristics are warranted when the
device is operated within these ranges.
Always use semiconductor devices within their recommended operating condition ranges.
Operation outside these ranges may adversely affect reliability and could result in device failure.
No warranty is made with respect to uses, operating conditions, or combinations not represented
on the data sheet. Users considering application outside the listed conditions are advised to contact
their representatives beforehand.
DS501-00019-2v0-E
11
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet MB85RC64A.PDF ] | |
Hoja de datos destacado
| Número de pieza | Descripción | Fabricantes |
| MB85RC64 | 64 K (8 K x 8) Bit I2C | Fujitsu |
| MB85RC64A | 64K (8K x 8) Bit I2C | Fujitsu |
| MB85RC64TA | 64K (8K x 8) Bit I2C | Fujitsu |
| Número de pieza | Descripción | Fabricantes |
| SLA6805M | High Voltage 3 phase Motor Driver IC. |
 Sanken |
| SDC1742 | 12- and 14-Bit Hybrid Synchro / Resolver-to-Digital Converters. |
 Analog Devices |
|
DataSheet.es es una pagina web que funciona como un repositorio de manuales o hoja de datos de muchos de los productos más populares, |
| DataSheet.es | 2020 | Privacy Policy | Contacto | Buscar |