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PDF CY7C69356 Data sheet ( Hoja de datos )
| Número de pieza | CY7C69356 | |
| Descripción | Multi-Touch Gesture Full Speed USB Controller | |
| Fabricantes | Cypress Semiconductor | |
| Logotipo |  |
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CY7C69356
TrueTouch® Multi-Touch Gesture
Full Speed USB Controller
TrueTouch® Multi-Touch Gesture Full Speed USB Controller
Features
■ Powerful Harvard-architecture processor
❐ M8C processor speeds running up to 24 MHz
❐ Low power at high processing speeds
❐ Interrupt controller
❐ 1.71 V to 5.5 V operating voltage without USB
❐ Commercial temperature range: 0 °C to +70 °C
■ TrueTouch™ capacitive touchscreen controller
❐ Supports single-touch and multi-touch applications
❐ Supports up to 33 X/Y sensor inputs
❐ Supports screen sizes 5.6 inch and below (typical)
❐ Fast scan rates: Typical 400 µs per sensor
■ Includes gesture detection library
■ Allows development of customized gestures
■ Low-power TrueTouch block
❐ 2.5 mA average supply current at 8-ms report rate
❐ 1.25 mA average supply current at 16-ms report rate
■ Flexible on-chip memory
❐ Program and data storage options:
• 32-KB flash
❐ 50,000 erase and write cycles
❐ 2048 bytes SRAM data storage
❐ Partial flash updates
❐ Flexible protection modes
❐ In-system serial programming (ISSP)
■ Full-speed USB (12 Mbps)
❐ Eight uni-directional endpoints
❐ One bi-directional control endpoint
❐ USB 2.0 compliant
❐ Dedicated 512 byte buffer
❐ Internal 3.3-V output regulator
❐ Available on 48-pin QFN packages only
❐ Operating voltage with USB enabled:
• 3.15 V to 3.45 V when supply voltage is around 3.3 V
• 4.35 V to 5.25 V when supply voltage is around 5.0 V
■ Complete development tools
❐ Free development tool (PSoC Designer™)
❐ Full-featured, in-circuit emulator, and programmer
❐ Full speed emulation
❐ Complex breakpoint structure
❐ 128-K trace memory
■ Precision, programmable clocking
❐ Internal ± 5.0 percent 6, 12, or 24 MHz main oscillator
❐ Internal low-speed oscillator at 32 kHz for Watchdog and
Sleep
❐ Optional external 32-kHz crystal
❐ 0.25 percent accuracy for USB with no external components
■ Programmable pin configurations
❐ 25 mA sink current on all GPIO
❐ Pull up, High Z, open drain CMOS drive modes on all GPIO
❐ CMOS drive mode on ports 0 and 1
❐ Up to 36 analog inputs on GPIO
❐ Configurable inputs on all GPIO
❐ Selectable, regulated digital I/O on port 1
❐ Configurable input threshold for port 1
❐ 3.0 V, 20 mA total port 1 source current
❐ 5 mA source current mode on ports 0 and 1
❐ Hot-swap capable on all Port1GPIO
■ Versatile analog mux
❐ Common internal analog bus
❐ Simultaneous connection of I/O combinations
❐ High PSRR comparator
❐ Low dropout voltage regulator for the analog array
■ Additional system resources
❐ I2C slave
• Selectable to 50 kHz, 100 kHz, or 400 kHz
• Implementation requires no clock stretching
• Implementation during sleep modes with less than 100 A
• Hardware address detection
❐ SPI master and SPI slave
• Configurable between 46.9 kHz and 12 MHz
❐ Three 16-bit timers
❐ Watchdog and sleep timers
❐ Internal voltage reference
❐ Integrated supervisory circuit
❐ 8- to 10-bit Incremental analog-to-digital converter (ADC)
■ Package options
❐ 48-pin 7 × 7 × 1.0 mm QFN
CONFIDENTIAL - RELEASED ONLY UNDER NONDISCLOSURE AGREEMENT (NDA)
Cypress Semiconductor Corporation • 198 Champion Court
• San Jose, CA 95134-1709 •
408-943-2600
Document Number: 001-86334 Rev. *B
Revised April 15, 2016
1 page  
CY7C69356
Full-Speed USB
The Encore-VI USB system resource adheres to the USB 2.0
Specification for full speed devices operating at 12 Mb/second
with one upstream port and one USB address. Encore-VI USB
consists of these components:
■ Serial interface engine (SIE) block.
■ PSoC memory arbiter (PMA) block.
■ 512 bytes of dedicated SRAM.
■ A full-speed USB Transceiver with internal regulator and two
dedicated USB pins.
Figure 2. USB Transceiver Regulator
VOLTAGE
REGULATOR
5V 3.3V
TEN
TD
RECEIVERS
PDN
RD
DPO
RSE0
DMO
1.5K
PS2 Pull Up
5K
DP
DM
TRANSMITTER
At the Encore-VI system level, the full-speed USB system
resource interfaces to the rest of the Encore-VI by way of the
M8C’s register access instructions and to the outside world by
way of the two USB pins. The SIE supports nine endpoints
including a bidirectional control endpoint (endpoint 0) and eight
unidirectional data endpoints (endpoints 1 to 8). The
unidirectional data endpoints are individually configurable as
either IN or OUT.
The USB Serial Interface Engine (SIE) allows the Encore-VI
device to communicate with the USB host at full speed data rates
(12 Mb/s). The SIE simplifies the interface to USB traffic by
automatically handling the following USB processing tasks
without firmware intervention:
■ Translates the encoded received data and formats the data to
be transmitted on the bus.
■ Generates and checks cyclical redundancy checks (CRCs).
Incoming packets failing checksum verification are ignored.
■ Checks addresses. Ignores all transactions not addressed to
the device.
■ Sends appropriate ACK/NAK/Stall handshakes.
■ Identifies token type (SETUP, IN, OUT) and sets the
appropriate token bit once a valid token in received.
■ Identifies Start-of-Frame (SOF) and saves the frame count.
■ Sends data to or retrieves data from the USB SRAM, by way
of the PSoC Memory Arbiter (PMA).
Firmware is required to handle various parts of the USB
interface. The SIE issues interrupts after key USB events to
direct firmware to appropriate tasks:
■ Fill and empty the USB data buffers in USB SRAM.
■ Enable PMA channels appropriately.
■ Coordinate enumeration by decoding USB device requests.
■ Suspend and resume coordination.
■ Verify and select data toggle values.
10-bit ADC
The ADC on Encore-VI device is an independent block with a
state machine interface to control accesses to the block. The
ADC is housed together with the temperature sensor core and
can be connected to this or the Analog mux bus. As a default
operation, the ADC is connected to the temperature sensor
diodes to give digital values of the temperature.
Figure 3. ADC System Performance Block Diagram
VIN
TEMP SENSOR/ ADC
TEMP
DIODES
ADC
SYSTEM BUS
INTERFACE BLOCK
COMMAND/ STATUS
Interface to the M8 C
( Processor ) Core
The ADC User Module contains an integrator block and one
comparator with positive and negative input set by the MUXes.
CONFIDENTIAL - RELEASED ONLY UNDER NONDISCLOSURE AGREEMENT (NDA)
Document Number: 001-86334 Rev. *B
Page 5 of 31
5 Page 
Electrical Specifications
This section presents the DC and AC electrical specifications of the CY7C69356 PSoC devices.
Figure 7. Voltage versus CPU Frequency
5.5 V
CY7C69356
1.71 V
5.7 MHz
CPU Frequency
24 MHz
Absolute Maximum Ratings
Table 2. Absolute Maximum Ratings
Symbol
TSTG
Vdd
VIO
VIOZ
IMIO
ESD
LU
Description
Storage temperature
Supply voltage relative to Vss
DC input voltage
DC voltage applied to tristate
Maximum current into any port
pin
Electro static discharge voltage
Latch-up current
Conditions
Higher storage temperatures
reduces data retention time.
Recommended Storage
Temperature is +25 °C ± 25 °C.
Extended duration storage
temperatures above 85 °C
degrades reliability.
Human Body Model ESD.
In accordance with JESD78
standard.
Min
–55
–0.5
Vss – 0.5
Vss – 0.5
–25
2000
–
Typ Max Units
+25
+125
°C
– +6.0 V
– Vdd + 0.5 V
– Vdd + 0.5 V
– +50 mA
– –V
– 200 mA
Operating Temperature
Table 3. Operating Temperature
Symbol
Description
Conditions
Min Typ Max Units
TA Ambient temperature
0 – +70 °C
TJ
Operational die temperature
The temperature rise from ambient
to junction is package specific. See
Table 23 on page 26. The user must
0
– +85 °C
limit the power consumption to
comply with this requirement.
CONFIDENTIAL - RELEASED ONLY UNDER NONDISCLOSURE AGREEMENT (NDA)
Document Number: 001-86334 Rev. *B
Page 11 of 31
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet CY7C69356.PDF ] | |
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