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PDF PL613-01 Data sheet ( Hoja de datos )
| Número de pieza | PL613-01 | |
| Descripción | 8 Output Clock IC | |
| Fabricantes | Microchip | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de PL613-01 (archivo pdf) en la parte inferior de esta página. Total 20 Páginas | ||
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PL613-01
1.8V to 3.3V, PicoPLL, 3-PLL, 200 MHz, 8 Output Clock IC
Features
• Designed for PCB Space Savings with Three
Low-Power Programmable PLLs and up to 8
Clock Outputs
• Low Power Consumption
- 10 µA Typical When PDB is Activated
• Output Frequency:
- ≤110 MHz at 1.8V Operation
- ≤166 MHz at 2.5V Operation
- ≤200 MHz at 3.3V Operation
• Input Frequency:
- Fundamental Crystal: 10 MHz to 40 MHz
- Reference Input: 10 MHz to 200 MHz
• Programmable I/O Pins Can be Configured as
Output Enable (OE), Configuration Switching
(CSEL), Frequency Switching (FSELX), Power
Down (PDB) Inputs, or Clock Outputs
• Disabled Outputs Programmable as HiZ or Active
Low
• Four Distinct Configurations Selectable with
CSEL[0:1]
• Single 1.8V, 2.5V, or 3.3V ±10% Power Supply
• Temperature range: 0°C to 70°C, –40°C to +85°C
• Available in 3 mm x 3 mm QFN or TSSOP
Packages
General Description
The PL613-01 is an advanced triple PLL design based
on Microchip’s PicoPLL™, the world’s smallest
programmable clock, technology. This advanced
technology allows the eight output PL613-01 to fit in to
a small 3 mm x 3 mm QFN or TSSOP package for high
performance, low-power, low-cost applications.
Besides its small form factor and 8 outputs that can
reduce overall system costs, the PL613-01 offers
superior phase noise, jitter and power consumption
performance.
The power down feature of PL613-01, when activated,
allows the IC to consume less than 10 µA of power,
while its CSEL[0:1] allows switching between up to four
pre-programmed configurations. The FSELX, on the
other hand, allows frequency switching of two outputs
(CLK1 and CLK2) on a single clock pin (CLK2).
Block Diagram
XIN/FIN
XOUT
FREF
Xtal FREF Programmable
OSC
PLL1
OE, OEM
CSEL[0:1]
FSELX
PDB
Output Drive
Programmable Function
FREF
Programmable
PLL2
FREF
Programmable
PLL3
PL613-01
VCO1
VCO2
VCO3
Odd/Even
Divider
(5-bits)
Odd/Even
Divider
(5-bits)
Odd/Even
Divider
(5-bits)
Odd/Even
Divider
(5-bits)
Odd/Even
Divider
(5-bits)
÷1, ÷2,
÷4, ÷8
÷1, ÷2,
÷4, ÷8
÷1, ÷2,
÷4, ÷8
CLK2
CLK3, OE4
CLK4
CLK1, OE2
CLK0, FSELX
CLK7, OE0, CSEL1
CLK5, OE6, CSEL0
CLK6, OEM, PDB
2016 Microchip Technology Inc.
DS20005650A-page 1
1 page  
PL613-01
2.0 PIN DESCRIPTIONS
The descriptions of the pins are listed in Table 2-1.
Package Types
PL613-01
16-PIN QFN
(TOP VIEW)
PL613-01
16-PIN TSSOP
(TOP VIEW)
CLK0, FSELX^ 1
VDD 2
GND 3
CLK1, OE2^ 4
16 15 14 13
XIN, FIN 1
GND 2
CLK5, OE6^, CSEL0 3
CLK6, OEM^, PDB^ 4
VDD 5
12 GND
CLK7, OE0^, CSEL1 6
11 XIN, FIN
CLK0, FSELX 7
10 XOUT
VDD 8
9 VDD
56 78
16 XOUT
15 VDD
14 CLK4
13 CLK3, OE4^
12 GND
11 CLK2
10 CLK1, OE2^
9 GND
Note 1: ^ denotes internal pull-up.
TABLE 2-1:
Pin Number
QFN-16
1
3, 6, 12
2, 9, 15
4
5
7
8
10
11
13
PIN FUNCTION TABLE
Pin Number
TSSOP-16
Pin Name
7
2, 9, 12
5, 8, 15
10
11
13
14
16
1
3
CLK0,
FSELX
GND
VDD
CLK1,
OE2
CLK2
CLK3,
OE4
CLK4
XOUT
XIN, FIN
CLK5,
OE6,
CSEL0
Pin Type
(Note 1)
Description
B
Programmable clock (CLK0) output or CLK2 frequency
switching (FSELX) input.
P Ground connection.
P VDD connection.
B
Programmable clock (CLK1) output or Output Enable
(OE) input for CLK2.
O Programmable clock (CLK2) output.
B
Programmable clock (CLK3) output or Output Enable
(OE) input for CLK4.
O Programmable clock (CLK4) output.
O Crystal output pin. Do not connect when using FIN.
I Crystal or reference clock input.
B
Programmable clock (CLK5) output or Output Enable
(OE) input for CLK6 or configuration switching input.
2016 Microchip Technology Inc.
DS20005650A-page 5
5 Page 
5.0 PACKAGING INFORMATION
5.1 Package Marking Information
16-Pin QFN*
XXXXXX
XXX
NNN
16-Pin TSSOP*
XXXX-XX
XXX
WWNNN
PL613-01
Example
P61301
K79
420
Example
P613-01
A20
13016
Legend:
XX...X
Y
YY
WW
NNN
e3
*
Product code or customer-specific information
Year code (last digit of calendar year)
Year code (last 2 digits of calendar year)
Week code (week of January 1 is week ‘01’)
Alphanumeric traceability code
Pb-free JEDEC® designator for Matte Tin (Sn)
This package is Pb-free. The Pb-free JEDEC designator ( e3 )
can be found on the outer packaging for this package.
●, ▲, ▼ Pin one index is identified by a dot, delta up, or delta down (triangle
mark).
Note:
In the event the full Microchip part number cannot be marked on one line, it will
be carried over to the next line, thus limiting the number of available
characters for customer-specific information. Package may or may not include
the corporate logo.
Underbar (_) and/or Overbar (⎯) symbol may not be to scale.
2016 Microchip Technology Inc.
DS20005650A-page 11
11 Page | ||
| Páginas | Total 20 Páginas | |
| PDF Descargar | [ Datasheet PL613-01.PDF ] | |
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