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Número de pieza | D75P0016 | |
Descripción | UPD75P0016 | |
Fabricantes | Renesas | |
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Hay una vista previa y un enlace de descarga de D75P0016 (archivo pdf) en la parte inferior de esta página. Total 30 Páginas | ||
No Preview Available ! DATA SHEET
MOS INTEGRATED CIRCUIT
µPD75P0016
4-BIT SINGLE-CHIP MICROCONTROLLER
The µPD75P0016 replaces the µPD750008’s internal mask ROM with a one-time PROM and features expanded
ROM capacity.
Because the µPD75P0016 supports programming by users, it is suitable for use in prototype testing for system
development using the µPD750004, 750006, or 750008 products, and for use in small-lot production.
Detailed information about product features and specifications can be found in the following document
µPD750008 User's Manual: U10740E
FEATURES
• Compatible with µPD750008
• Memory capacity:
• PROM : 16384 × 8 bits
• RAM : 512 × 4 bits
• Can operate in same power supply voltage as the mask ROM version µPD750008
• VDD = 2.2 to 5.5 V
• Supports QTOP™ microcontroller
Remark QTOP Microcontroller is the general name for a total support service that includes imprinting, marking,
screening, and verifying one-time PROM single-chip microcontrollers offered by NEC Electronics.
ORDERING INFORMATION
Part number
µPD75P0016CU
µPD75P0016CU-A
µPD75P0016GB-3BS-MTX
µPD75P0016GB-3BS-MTX-A
Package
42-pin plastic shrink DIP (600 mil, 1.778-mm pitch)
42-pin plastic shrink DIP (600 mil, 1.778-mm pitch)
44-pin plastic QFP (10 × 10 mm, 0.8-mm pitch)
44-pin plastic QFP (10 × 10 mm, 0.8-mm pitch)
ROM (× 8 bits)
16384
16384
16384
16384
Caution On-chip pull-up resistors by mask option cannot be provided.
Remark Products with “-A” at the end of the part number are lead-free products.
The information in this document is subject to change without notice. Before using this document, please
confirm that this is the latest version.
Not all products and/or types are available in every country. Please check with an NEC Electronics
sales representative for availability and additional information.
Document No. U10328EJ3V3DS00 (3rd edition)
Date Published August 2005 N CP(K)
Printed in Japan
The mark shows major revised points.
1 page µPD75P0016
PIN IDENTIFICATIONS
P00-P03
P10-P13
P20-P23
P30-P33
P40-P43
P50-P53
P60-P63
P70-P73
P80, P81
KR0-KR7
VDD
VSS
VPP
NC
: Port0
: Port1
: Port2
: Port3
: Port4
: Port5
: Port6
: Port7
: Port8
: Key Return 0-7
: Positive Power Supply
: Ground
: Programming Power Supply
: No Connection
SCK
SI
SO
SB0, SB1
RESET
TI0
PTO0, PTO1
BUZ
PCL
INT0, 1, 4
INT2
X1, X2
XT1, XT2
MD0-MD3
D0-D7
: Serial Clock
: Serial Input
: Serial Output
: Serial Data Bus 0,1
: Reset
: Timer Input 0
: Programmable Timer Output 0, 1
: Buzzer Clock
: Programmable Clock
: External Vectored Interrupt 0, 1, 4
: External Test Input 2
: Main System Clock Oscillation 1, 2
: Subsystem Clock Oscillation 1, 2
: Mode Selection 0-3
: Data Bus 0-7
Data Sheet U10328EJ3V3DS
5
5 Page µPD75P0016
3.4 Handling of Unused Pins
Table 3-1. Handling of Unused Pins
Pin
P00/INT4
P01/SCK
P02/SO/SB0
P03/SI/SB1
P10/INT0-P12/INT2
P13/TI0
P20/PTO0
P21/PTO1
P22/PCL
P23/BUZ
P30/MD0-P33/MD3
P40/D0-P43/D3
P50/D4-P53/D7
P60/KR0-P63/KR3
P70/KR4-P73/KR7
P80, P81
XT1Note
XT2Note
VPP
Recommended connection
Connect to VSS or VDD
Individually connect to VSS or VDD via resistor
Connect to VSS
Connect to VSS or VDD
Input mode : individually connect to VSS or VDD
via resistor
Output mode : open
Connect to VSS
Input mode : individually connect to VSS or VDD
via resistor
Output mode : open
Connect to VSS
Open
Make sure to connect directly to VDD
Note When the subsystem clock is not used, set SOS. 0 to 1 (not to use the internal feedback resistor).
Data Sheet U10328EJ3V3DS
11
11 Page |
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