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PDF IS65WV25616DBLL Data sheet ( Hoja de datos )
| Número de pieza | IS65WV25616DBLL | |
| Descripción | ULTRA LOW POWER CMOS STATIC SRAM | |
| Fabricantes | ISSI | |
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IS62WV25616DALL/DBLL, IS65WV25616DBLL
256K x 16 LOW VOLTAGE,
ULTRA LOW POWER CMOS STATIC SRAM
FEATURES
• High-speed access time: 35, 45, 55 ns
• CMOS low power operation
30 mW (typical) operating
6 µW (typical) CMOS standby
• TTL compatible interface levels
• Single power supply
1.65V--2.2V Vdd (IS62WV25616DALL)
2.5V--3.6V Vdd (IS62/65WV25616DBLL)
• Fully static operation: no clock or refresh
required
• Three state outputs
• Data control for upper and lower bytes
• Industrial and Automotive temperature support
• Lead-free available
• 2 CS option available
DESCRIPTION
FEBRUARY 2012
The ISSI IS62WV25616DALL and IS62/65WV25616DBLL
are high-speed, low power, 4M bit SRAMs organized as
256K words by 16 bits. It is fabricated using ISSI's high-
performance CMOS technology.This highly reliable process
coupled with innovative circuit design techniques, yields
high-performance and low power consumption devices.
When CS1 is HIGH (deselected) or when CS2 is low
(deselcted) or when CS1 is LOW, CS2 is HIGH and both
LB and UB are HIGH, the device assumes a standby mode
at which the power dissipation can be reduced down with
CMOS input levels.
Easy memory expansion is provided by using Chip Enable
and Output Enable inputs.The active LOWWrite Enable (WE)
controls both writing and reading of the memory. A data byte
allows Upper Byte (UB) and Lower Byte (LB) access.
The IS62WV25616DALL and IS62/65WV25616DBLL are
packaged in the JEDEC standard 44-Pin TSOP (TYPE II)
and 48-pin mini BGA (6mmx8mm).
FUNCTIONAL BLOCK DIAGRAM
A0-A17
DECODER
256K x 16
MEMORY ARRAY
VDD
GND
I/O0-I/O7
Lower Byte
I/O8-I/O15
Upper Byte
I/O
DATA
CIRCUIT
CS2
CS1
OE
WE
UB
LB
CONTROL
CIRCUIT
COLUMN I/O
Copyright © 2012 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time without
notice. ISSI assumes no liability arising out of the application or use of any information, products or services described herein. Customers are advised to obtain the lat-
est version of this device specification before relying on any published information and before placing orders for products.
Integrated Silicon Solution, Inc. does not recommend the use of any of its products in life support applications where the failure or malfunction of the product can reasonably be ex-
pected to cause failure of the life support system or to significantly affect its safety or effectiveness. Products are not authorized for use in such applications unless Integrated Silicon
Solution, Inc. receives written assurance to its satisfaction, that:
a.) the risk of injury or damage has been minimized;
b.) the user assume all such risks; and
c.) potential liability of Integrated Silicon Solution, Inc is adequately protected under the circumstances
Integrated Silicon Solution, Inc. — www.issi.com
Rev. B
02/07/2012
1
1 page  
IS62WV25616DALL/DBLL, IS65WV25616DBLL
DC ELECTRICAL CHARACTERISTICS (Over Operating Range)
Vdd = 3.3V + 5%
Symbol Parameter
Test Conditions
Min.
Voh
Output HIGH Voltage
Vdd = Min., Ioh = –1 mA
2.4
Vol
Output LOW Voltage
Vdd = Min., Iol = 2.1 mA
—
Vih
Input HIGH Voltage
2
Vil
Input LOW Voltage(1)
–0.3
Ili
Input Leakage
GND ≤ Vin ≤ Vdd
–1
Ilo
Output Leakage
GND ≤ Vout ≤ Vdd, Outputs Disabled
–1
Note:
1. Vil (min.) = –0.3V DC; Vil (min.) = –2.0V AC (pulse width < 10 ns). Not 100% tested.
Vih (max.) = Vdd + 0.3V DC; Vih (max.) = Vdd + 2.0V AC (pulse width < 10 ns). Not 100% tested.
Max.
—
0.4
Vdd + 0.3
0.8
1
1
Unit
V
V
V
V
µA
µA
DC ELECTRICAL CHARACTERISTICS (Over Operating Range)
Vdd = 2.3V-3.6V
Symbol Parameter
Test Conditions
Min.
Voh
Output HIGH Voltage
Vdd = Min., Ioh = –1.0 mA
1.8
Vol
Output LOW Voltage
Vdd = Min., Iol = 2.1 mA
—
Vih
Input HIGH Voltage
2.0
Vil
Input LOW Voltage(1)
–0.3
Ili
Input Leakage
GND ≤ Vin ≤ Vdd
–1
Ilo
Output Leakage
GND ≤ Vout ≤ Vdd, Outputs Disabled
–1
Note:
1. Vil (min.) = –0.3V DC; Vil (min.) = –2.0V AC (pulse width < 10 ns). Not 100% tested.
Vih (max.) = Vdd + 0.3V DC; Vih (max.) = Vdd + 2.0V AC (pulse width < 10 ns). Not 100% tested.
Max.
—
0.4
Vdd + 0.3
0.8
1
1
Unit
V
V
V
V
µA
µA
DC ELECTRICAL CHARACTERISTICS (Over Operating Range)
Vdd = 1.65V-2.2V
Symbol Parameter
Test Conditions
Vdd
Min.
Voh
Output HIGH Voltage
Ioh = -0.1 mA
1.65-2.2V
1.4
Vol
Output LOW Voltage
Iol = 0.1 mA
1.65-2.2V
—
Vih
Input HIGH Voltage
1.65-2.2V
1.4
Vil(1)
Input LOW Voltage
1.65-2.2V
–0.2
Ili
Input Leakage
GND ≤ Vin ≤ Vdd
–1
Ilo
Output Leakage
GND ≤ Vout ≤ Vdd, Outputs Disabled
–1
Note:
1. Vil (min.) = –0.3V DC; Vil (min.) = –2.0V AC (pulse width < 10 ns). Not 100% tested.
Vih (max.) = Vdd + 0.3V DC; Vih (max.) = Vdd + 2.0V AC (pulse width < 10 ns). Not 100% tested.
Max.
—
0.2
Vdd + 0.2
0.4
1
1
Unit
V
V
V
V
µA
µA
Integrated Silicon Solution, Inc. — www.issi.com
Rev. B
02/07/2012
5
5 Page 
IS62WV25616DALL/DBLL, IS65WV25616DBLL
AC WAVEFORMS
WRITE CYCLE NO. 2 (WE Controlled: OE is HIGH During Write Cycle)
ADDRESS
OE
CS1
CS2
WE
LB, UB
DOUT
DIN
tWC
tSCS1
tSCS2
tAW
t PWE
tHA
tSA tHZWE
DATA UNDEFINED
HIGH-Z
tLZWE
tSD tHD
DATA-IN VALID
Integrated Silicon Solution, Inc. — www.issi.com
Rev. B
02/07/2012
11
11 Page | ||
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