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PDF RClamp3346P Data sheet ( Hoja de datos )
| Número de pieza | RClamp3346P | |
| Descripción | 6-Line ESD protection | |
| Fabricantes | Semtech | |
| Logotipo |  |
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PROTECTION PRODUCTS - RailClamp®
Description
The RClamp®3346P provides ESD protection for high-
speed data interfaces. It features a high maximum
ESD withstand voltage of ±17kV contact and ±20kV
air discharge per IEC 61000-4-2. RClamp3346P is
designed to minimize both the ESD peak clamping and
the TLP clamping. Package inductance is reduced at
each pin resulting in lower peak ESD clamping voltage.
The dynamic resistance is among the industry’s lowest
at 0.15 Ohms (typical). Maximum capacitance on each
line to ground is 0.65pF allowing the RClamp3346P to
be used in applications operating in excess of 5GHz
without signal attenuation. Each device will protect up
to six lines (three high-speed pairs).
The RClamp3346P is in a 7-pin SGP2708N7 package
measuring 2.7 x 0.8mm with a nominal height of 0.50mm.
The leads have a nominal pin-to-pin pitch of 0.40mm.
Flow- through package design simplifies PCB layout and
maintains signal integrity on high-speed lines.
The combination of low peak ESD clamping, low dynamic
resistance, and innovative package design enables this
device to provide the highest level of ESD protection for
applications such as USB 3.0, eSATA, and DisplayPort.
RClamp3346P
Low Capacitance RClamp®
6-Line ESD protection
PRELIMINARY
Features
ESD protection for high-speed data lines to
IEC 61000-4-2 (ESD) ±20kV (air), ±17kV (contact)
IEC 61000-4-5 (Lightning) 5A (8/20μs)
IEC 61000-4-4 (EFT) 40A (5/50ns)
Package design optimized for high speed lines
Flow-Through design
Protects six high-speed lines
Low capacitance: 0.65pF Maximum (I/O to Ground)
Low ESD clamping voltage
Low dynamic resistance: 0.15 Ohms (Typ)
Qualified to AEC-Q100
Solid-state silicon-avalanche technology
Mechanical Characteristics
SGP2708N7 7-pin package (2.7 x 0.8 x 0.50mm)
Pb-Free, Halogen Free, RoHS/WEEE Compliant
Lead Pitch: 0.4mm (intra-pair)
Lead finish: NiPdAu
Marking: Marking Code
Packaging: Tape and Reel
Applications
USB 3.0
eSATA
Display Port
LVDS
Dimensions
0.80 BSC
0.40 BSC
Circuit Diagram
0.80
2.70
0.50
Pin 1
Pin 3
Pin 4
Pin 5
Pin 6
Pin 7
Pin 2
Nominal Dimensions in mm (Bottom View)
Revision 11/12/2013
1
6-Line Protection
www.semtech.com
1 page  
RClamp3346P
PROTECTION PRODUCTS
Applications Information
PRELIMINARY
Protecting USB 3.0 Ports
RClamp3346P is designed to protect all six USB 3.0
SuperSpeed and high speed differential lines. PCB
traces enter and exit each I/O pin and ground is
connected at pin 2. For best results, it is
recommended that the ground connection be made
using a filled via-in-pad. The via should be filled with a
conductive paste. This technique saves board space
and reduces parasitic inductance in the ground path.
Figures 2 and 3 are examples of how to route high
speed differential traces through the RClamp3346P.
Differential impedance of each pair can easily be
controlled for USB 3.0 (85 Ohms +/-15%).
The RClamp3346P should be placed as close to the
connector as possible for optimum ESD performance.
Internal construction of the RClamp3346P has been
optimized to minimize series inductance within the
package. This helps to reduce the ESD peak clamping
voltage. Dynamic resistance is extremely low (typically
0.15 Ohms) further reducing the ESD clamping voltage.
Figure 1 - USB 3.0 Eye Diagram with RClamp3346P
USB 3.0 - Type B
Device Connector
SSTX-
SSTX+
D+ D-
GND
GND
VBus
SSRX-
RClamp3346P
SSRX+
uClamp0541T
USB 3.0 - Type A
Device Connector
SSRX-
RClamp3346P
uClamp0541T
GND
SSRX+
GND
D+
SSTX-
D-
SSTX+
VBus
Figure 2 - Example USB 3.0 Layout
(Type B Device Connector)
© 2013 Semtech Corporation
Figure 3 - Example USB 3.0 Layout
(Type A Device Connector)
5 www.semtech.com
5 Page | ||
| Páginas | Total 9 Páginas | |
| PDF Descargar | [ Datasheet RClamp3346P.PDF ] | |
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