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HD74HC126 fiches techniques PDF

Renesas - Quad. Bus Buffer Gates

Numéro de référence HD74HC126
Description Quad. Bus Buffer Gates
Fabricant Renesas 
Logo Renesas 





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HD74HC126 fiche technique
HD74HC125, HD74HC126
Quad. Bus Buffer Gates (with 3-state outputs)
REJ03D0565-0300
Rev.3.00
Mar 25, 2009
Description
The HD74HC125, HD74HC126 require the 3-state control input C to be taken high to put the output into the high
impedance condition, whereas the HD74HC125, HD74HC126 requires the control input to be low to put the output into
high impedance.
Features
High Speed Operation: tpd = 8 ns typ (CL = 50 pF)
High Output Current: Fanout of 15 LSTTL Loads
Wide Operating Voltage: VCC = 2 to 6 V
Low Input Current: 1 µA max
Low Quiescent Supply Current: ICC (static) = 4 µA max (Ta = 25°C)
Ordering Information
Part Name
Package Type
Package Code
(Previous Code)
Package
Abbreviation
HD74HC125P
HD74HC126P
DILP-14 pin
PRDP0014AB-B
(DP-14AV)
P
HD74HC125FPEL
HD74HC126FPEL
SOP-14 pin (JEITA)
PRSP0014DF-B
(FP-14DAV)
FP
HD74HC125RPEL
HD74HC126RPEL
SOP-14 pin (JEDEC)
PRSP0014DE-A
(FP-14DNV)
RP
HD74HC125TELL
HD74HC126TELL
TSSOP-14 pin
PTSP0014JA-B
(TTP-14DV)
T
Note: Please consult the sales office for the above package availability.
Taping Abbreviation
(Quantity)
EL (2,000 pcs/reel)
EL (2,500 pcs/reel)
ELL (2,000 pcs/reel)
Function Table
Inputs
C
HC125
HC126
HL
LH
LH
H : High level
L : Low level
X : Irrelevant
Z : Off (high-impedance) state of a 3-state output.
A
X
L
H
HC125
Z
L
H
Output
Y
HC126
Z
L
H
REJ03D0565-0300 Rev.3.00 Mar 25, 2009
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