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HD74LV27A fiches techniques PDF

Renesas - Triple 3-input Positive NOR Gates

Numéro de référence HD74LV27A
Description Triple 3-input Positive NOR Gates
Fabricant Renesas 
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HD74LV27A fiche technique
HD74LV27A
Triple 3-input Positive NOR Gates
REJ03D0238–0300Z
(Previous ADE-205-256A (Z))
Rev.3.00
Jun. 01, 2004
Description
The HD74LV27A performs the Boolean functions Y = ABC or Y = A+B+C in positive logic.
Low-voltage and high-speed operation is suitable for the battery-powered products (e.g., notebook computers), and the
low-power consumption extends the battery life.
Features
VCC = 2.0 V to 5.5 V operation
All inputs VIH (Max.) = 5.5 V (@VCC = 0 V to 5.5 V)
All outputs VO (Max.) = 5.5 V (@VCC = 0 V)
Typical VOL ground bounce < 0.8 V (@VCC = 3.3 V, Ta = 25°C)
Typical VOH undershoot > 2.3 V (@VCC = 3.3 V, Ta = 25°C)
Output current ±6 mA (@VCC = 3.0 V to 3.6 V), ±12 mA (@VCC = 4.5 V to 5.5 V)
Ordering Information
Part Name
Package Type
Package Code
Package
Abbreviation
HD74LV27AFPEL
SOP–14 pin(JEITA) FP–14DAV
FP
HD74LV27ARPEL
SOP–14 pin(JEDEC) FP–14DNV
RP
HD74LV27ATELL
TSSOP–14 pin
TTP–14DV
T
Note: Please consult the sales office for the above package availability.
Taping Abbreviation
(Quantity)
EL (2,000 pcs/reel)
EL (2,500 pcs/reel)
ELL (2,000 pcs/reel)
Function Table
Inputs
A B C Output Y
HXXL
XHXL
XXHL
LLLH
Note: H: High level
L: Low level
X: Immaterial
Rev.3.00 Jun. 01, 2004 page 1 of 8

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