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PDF 2N5195G Data sheet ( Hoja de datos )
| Número de pieza | 2N5195G | |
| Descripción | Silicon PNP Power Transistors | |
| Fabricantes | ON Semiconductor | |
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2N5194G, 2N5195G
Silicon PNP Power
Transistors
These devices are designed for use in power amplifier and switching
circuits; excellent safe area limits.
Features
• Complement to NPN 2N5191, 2N5192
• These Devices are Pb−Free and are RoHS Compliant*
MAXIMUM RATINGS (Note 1)
Rating
Symbol
Value
Unit
Collector−Emitter Voltage
2N5194G
2N5195G
VCEO
60
80
Vdc
Collector−Base Voltage
2N5194G
2N5195G
VCB Vdc
60
80
Emitter−Base Voltage
Collector Current
Base Current
Total Device Dissipation
@ TC = 25°C
Derate above 25°C
VEB 5.0 Vdc
IC 4.0 Adc
IB 1.0 Adc
PD
40 W
320 W/°C
Operating and Storage Junction
Temperature Range
TJ, Tstg – 65 to +150 °C/W
Stresses exceeding those listed in the Maximum Ratings table may damage the
device. If any of these limits are exceeded, device functionality should not be
assumed, damage may occur and reliability may be affected.
1. Indicates JEDEC registered data.
THERMAL CHARACTERISTICS
Characteristic
Thermal Resistance, Junction−to−Case
Symbol
RqJC
Max
3.12
Unit
°C/W
*For additional information on our Pb−Free strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
© Semiconductor Components Industries, LLC, 2013
December, 2013 − Rev. 15
1
http://onsemi.com
4 AMPERE
POWER TRANSISTORS
PNP SILICON
60 − 80 VOLTS
COLLECTOR
2, 4
3
BASE
1
EMITTER
123
TO−225
CASE 77−09
STYLE 1
MARKING DIAGRAM
YWW
2
N519xG
Y
WW
2N519x
G
= Year
= Work Week
= Device Code
x = 4 or 5
= Pb−Free Package
ORDERING INFORMATION
Device
Package
Shipping
2N5194G
TO−225
(Pb−Free)
500 Units / Bulk
2N5195G
TO−225
(Pb−Free)
500 Units / Bulk
Publication Order Number:
2N5194/D
1 page  
2N5194G, 2N5195G
10
5.0
TJ = 150°C
2.0
1.0 ms
5.0 ms
dc
100 ms
1.0 SECONDARY BREAKDOWN LIMIT
THERMAL LIMIT @ TC = 25°C
0.5 BONDING WIRE LIMIT
CURVES APPLY BELOW RATED VCEO
0.2 2N5194
0.1
1.0
2N5195
2.0 5.0 10 20
50
VCE, COLLECTOR-EMITTER VOLTAGE (VOLTS)
Figure 11. Rating and Thermal Data
Active−Region Safe Operating Area
100
Note 1:
There are two limitations on the power handling ability of
a transistor; average junction temperature and second
breakdown. Safe operating area curves indicate IC − VCE
limits of the transistor that must be observed for reliable
operation; i.e., the transistor must not be subjected to greater
dissipation than the curves indicate.
The data of Figure 11 is based on TJ(pk) = 150_C. TC is
variable depending on conditions. Second breakdown pulse
limits are valid for duty cycles to 10% provided TJ(pk)
≤ 150_C. At high−case temperatures, thermal limitations
will reduce the power that can be handled to values less than
the limitations imposed by second breakdown.
1.0
0.7 D = 0.5
0.5
0.3 0.2
0.2
0.1
0.1 0.05
0.07
0.05 0.02
0.03 0.01
SINGLE PULSE
0.02
0.01
0.01 0.02 0.03 0.05 0.1
qJC(max) = 3.12°C/W
0.2 0.3
0.5 1.0 2.0 3.0 5.0 10 20 30
t, TIME OR PULSE WIDTH (ms)
Figure 12. Thermal Response
50
100 200 300 500 1000
DESIGN NOTE: USE OF TRANSIENT THERMAL RESISTANCE DATA
tP
PP
PP
t1
1/f
DUTY CYCLE, D = t1 f =
t1
tP
PEAK PULSE POWER = PP
Figure 13.
A train of periodical power pulses can be represented by
the model shown in Figure 13. Using the model and the
device thermal response, the normalized effective transient
thermal resistance of Figure 12 was calculated for various
duty cycles.
To find qJC(t), multiply the value obtained from Figure 12
by the steady state value qJC.
Example:
The 2N5193 is dissipating 50 watts under the following
conditions: t1 = 0.1 ms, tp = 0.5 ms. (D = 0.2).
Using Figure 12, at a pulse width of 0.1 ms and D = 0.2,
the reading of r(t1, D) is 0.27.
The peak rise in junction temperature is therefore:
DT = r(t) x PP x qJC = 0.27 x 50 x 3.12 = 42.2_C
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