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PDF FS1610 Data sheet ( Hoja de datos )
| Número de pieza | FS1610 | |
| Descripción | Advanced Power Management Controller | |
| Fabricantes | FyreStorm | |
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FS1610
Advanced Power Management Controller
Leading the Digital Power Revolution TM
GENERAL DESCRIPTION
FyreStorm’s FS1610 Advanced Power Management
Controller utilizes proprietary digital technology to pro-
vide a fully programmable power subsystem solution for
sophisticated mobile devices such as digital still cam-
eras, feature-phones, smart-phones, PDAs and hand-
held computers. Compared to traditional implementa-
tions, an FS1610 based solution reduces PCB area,
and its digital technology, which allows full programma-
bility, results in faster design cycles, allowing quicker
time-to-market for the end product. It reduces glue logic
by interfacing seamlessly to processors such as Intel’s
PXA family, Freescale Semiconductor’s MX families,
Samsung’s ARM9-based family and AMD’s Au1200
family.
The FS1610 provides eight highly efficient switch-mode
converters (three buck converters, one White LED
driver, three boost converters and one buck-boost con-
verter) and has integrated drivers that directly drive ex-
ternal MOSFETs. A patented digital control algorithm
reduces capacitor and inductor size and cost, reduces
quiescent current and improves conversion efficiency.
Additionally, the FS1610 provides three low-power LDO
regulators with internal pass FETs, a Real-Time-Clock
with a programmable alarm and a Watchdog Timer.
Start-up configuration of the device is stored in an inter-
nal EEPROM that can be programmed by the user, and
can then be managed by the host processor via the
device’s I2C or UART serial port. Load activation and
shedding profiles can also be specified in the EEPROM
and by the host. The FS1610 is also capable of stand-
alone operation using the parameters loaded from the
EEPROM at start-up.
The FS1610 is provided in a space-efficient, 8 x 8
FBGA package.
APPLICATIONS
Feature phones and smart phones
Portable media players and MP3 players
PDAs and hand-held computers
Digital still cameras and camcorders
Other portable electronics equipment
KEY FEATURES
Eight switching converters
– Three buck (step-down) converters
o Two converters available in Low Power
mode for high efficiency at low load currents
– Three boost (step-up) converters
– One buck-boost (step-up) converter for nega-
tive output voltage
– One constant current boost White LED driver
– High efficiency (typically 90%+) from 5% to
100% of programmed maximum current in ac-
tive mode
– Converters drive external MOSFET(s) directly
Switching converters feature all-digital loop
control technology
– Real-time analysis provides optimal power sys-
tem control and operation
– Precise supply-to-supply matching and tracking
– Programmable power-up and -down slew rates
– Programmable load connection and shedding
– Reduced component count yields smaller size
and lower cost
Three LDOs
Input voltage range: 2.8 to 5.5 Volts
Battery backup switching support
Dynamic programming for all buck and LDO
power rails
Power-up supply characteristics can be modi-
fied without hardware changes by reprogram-
ming the device’s EEPROM
– Fast and simple design with FyreStorm’s Web-
based Design Center
Capable of stand-alone operation using the pa-
rameters loaded from the EEPROM at start-up
– No serial interface with host required
– Utilize device pins for status/control
Integrated system support
– Real time clock with alarm and Watchdog timer
– Programmable host controller interrupt output
– Power Good and Power-on-Reset outputs
Remote management via I2C or UART interface
to host processor
Operates from a low-cost 32.768 KHz crystal or
external clock input
– Provides buffered 32 KHz output to the system
Low power consumption
– 50 µA in shutdown mode with RTC enabled
128 bytes user data space in EEPROM
8 x 8 mm FBGA package with 0.5 mm ball pitch
Data Sheet
Revision 6.2, August 2006
FyreStorm, Inc.
© 2004 - 2006, FyreStorm Inc.
PRELIMINARY
1 page  
FS1610
Symbol
Parameter
Conditions
Output-High voltage: All digital outputs, unless oth-
erwise specified
When configured as active
outputs, IOH = 4 mA
When configured as open-
drain output
Output-High voltage: CLKOUT
IOH = 1 mA, CO = 50 pF
VIH Input-High voltage: All digital inputs
VIL Input-Low voltage: All digital inputs
Input leakage current: All digital inputs except
nRSTI and nEXTON
Input voltage = 3.6 V
Input voltage = 0 V
Output-High leakage current: All open-drain outputs Output voltage = 3.6 V
Input leakage current: nRSTI and nEXTON
Input voltage = 2.5 V
Input voltage = 0 V
Min Typ Max Unit
2.0 2.4 V
3.75 V
2.0 2.4 V
1.6 3.75 V
0.4 V
– 1 + 1 µA
– 1 + 1 µA
0.2 µA
– 1 + 1 µA
62 125 150 µA
1. VDBTH is set to a default value of 3.10 V during the internal power-on-reset cycle. It may then be changed by data in the EEPROM.
2. Debounce interval is measured from the last bounce detected.
3. Based on 32.768 KHz crystal frequency
4. VIN, VIN[0], VIN[2], VIN[4], VIN[7], VIN[31], VIN[65] must be at the same voltage
Electrical Parameters – LDO Regulators
VIN = 3.0 V – 5.5 V, TA = – 20°C to 85°C unless otherwise noted. Typical values are at TA = +25°C and VIN = 3.6V. COUT = 0.47 µF unless oth-
erwise specified.
Symbol
Parameter
Conditions
Min Typ Max Unit
LDO[1], LDO[3]
Output voltage programming range
0.9 3.3 V
Output voltage programming resolution
50 mV
Initial voltage accuracy
IOUT = 0
- 0.5
0.5 %
Output voltage change under load
Dropout voltage
Maximum output current 1
IOUT = 0 to 60 mA,
COUT = 2.2 µF, X5R
IOUT = 60 mA
- 35 - 50 mV
200 <tbd> mV
60 mA
Quiescent current, VINLDO[x]
No load
1 µA
Quiescent current, VIN
Enabled, no load
LDO disabled
45 tbd µA
1 µA
VPG POK threshold
Rising
Falling
95 %
90 %
tFLT POK response time to out of regulation program-
ming range
1 255 ms
External output capacitor
RESR < 50 mΩ
LESL < 3 nH
1 Mhz < f < 50 MHz
470 1000 2200 nF
PSRR
f =10 KHz, IOUT = 60 mA
f =100 KHz, IOUT = 60 mA
LDO[2]
40
30
db
db
Output voltage programming range
0.9 3.3 V
Output voltage programming resolution
50 mV
Initial voltage accuracy
IOUT = 0
- 0.5
0.5 %
Output voltage change under load
IOUT = 0 to 60 mA,
COUT = 2.2 µF, X5R
- 35 - 50 mV
PRELIMINARY
Rev. 6.2/Aug 06
FyreStorm, Inc.
5
5 Page 
FS1610
Pin No. Type 1
B10 O
P11 I
A5 IA
P13 O
B12
B11 I
A1
A13 I
B9 I/O
A15 I/O
A14 I/O
A9 I/O
B7 P
Name
Description 2
POK
Power OK Output. POK is asserted when all the rails specified in the EEPROM to be
monitored by this status signal are above their regulation thresholds. Refer to Table 1
if not used.
nEXTON
External Power On Input. An internal de-bounce filter and a pull-up resistor are pro-
vided. If driven from logic, it must be driven from an open drain output to prevent re-
verse leakage current.
ADPTR_IN
AC Adapter Present. An input at the specified level indicates that an AC adapter is
present.
nADPTR_DET
Adapter Detected Output. Indicates that presence of an AC adapter has been de-
tected via the ADPTR_IN input. Refer to Table 1 if not used.
PWREN[3]
PWREN[2]
PWREN[1]
(Note 3)
Power Enable [3:1]. Power on/off control for any group of rails can be mapped to be
controlled by PWREN[1] or PWREN[2] or PWREN[3]. A low-high transition enables the
voltage rail group, a high-low transition disables the group. Once enabled or disabled,
a pre-programmed sequencing defined in the configuration EEPROM is activated.
(Note 3 does NOT apply to PWREN[1])
MFP[1]
(Note 3)
nLOPWR: Low Power Mode Enable Input. Activates the device’s LOWPOWER
operating mode. See Low Power Mode.
MFP[2]
(Note 3)
MFP[3]
(Note 3)
(Standalone Mode) – nLB: Low Battery Detect Output. This pin is asserted when-
ever VIN goes below the low-battery detect threshold.
(I2C Serial Mode) – SCL: I2C Clock Input.
(UART Serial mode) – EXTPEN2: External Power Enable Output. This output is
asserted (HIGH) at the conclusion of the internal power-up boot process, before turning
on any power rails, and is de-asserted when the FS1610 transitions to SHUTDOWN
state, after all FS1610 power rails are turned off.
(Standalone and I2C Serial Modes) – PWREN[4]/WDRST/ EXTPEN3: Power En-
able 4 Input or Watchdog Timer Reset Input or External Power Enable Output.
The function of this pin is selected via the EEPROM.
If configured as PWREN[4], a group of power rails can be mapped via the EEPROM to
be enabled/disabled via this input. See PWREN[3:1] for additional information.
If configured as WDRST, any transition on this input will reset the Watchdog Timer and
restart the programmed time-out interval.
If configured as External Power Enable, the output is asserted (HIGH) at the conclusion
of the internal power-up boot process, before turning on any power rails, and is de-
asserted when the FS1610 transitions to SHUTDOWN state, after all FS1610 power
rails are turned off.
(UART Serial mode) – TxD: Serial data output.
MFP[4]
(Note 3)
MFP[5]
(Note 3)
(Standalone Mode) – SD: Shutdown Input. When asserted, the FS1610 disables all
power enable groups (PWREN[5:0]) simultaneously. The sequence of disabling the
individual rails within each power enable group is as specified in the EEPROM.
Any rails that were enabled by serial commands and are not members of a power en-
able group are also disabled after all power enable groups have been disabled.
(UART and I2C Serial Modes) – nINTR: Interrupt Output. This pin is the output for
all internally generated interrupts. A read to the FS1610 via the serial bus provides the
status of the interrupt. The interrupts include RTC alarm and Low-battery detect. See
HSI User Manual for additional information.
(Standalone Mode) – PWREN[5] 2: Power Enable 5 input. A group of power rails
can be mapped via the EEPROM to be enabled/disabled via this input. See
PWREN[3:1] for additional information.
(I2C Serial Mode) – SDA: I2C Data Input/Output.
(UART Serial mode) – RxD: Serial Data Input.
BATBU
Backup battery input. A voltage must be present on BATBU in order for the device to
operate. Connect a bypass capacitor from this pin to RTCVSS.
PRELIMINARY
Rev. 6.2/Aug 06
FyreStorm, Inc.
11
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet FS1610.PDF ] | |
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