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PDF 74HC574 Data sheet ( Hoja de datos )
| Número de pieza | 74HC574 | |
| Descripción | Octal D-type flip-flop | |
| Fabricantes | NXP Semiconductors | |
| Logotipo |  |
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74HC574; 74HCT574
Octal D-type flip-flop; positive edge-trigger; 3-state
Rev. 7 — 4 March 2016
Product data sheet
1. General description
The 74HC574; 74HCT574 is an 8-bit positive-edge triggered D-type flip-flop with 3-state
outputs. The device features a clock (CP) and output enable (OE) inputs. The flip-flops will
store the state of their individual D-inputs that meet the set-up and hold time requirements
on the LOW-to-HIGH clock (CP) transition. A HIGH on OE causes the outputs to assume
a high-impedance OFF-state. Operation of the OE input does not affect the state of the
flip-flops. Inputs include clamp diodes. This enables the use of current limiting resistors to
interface inputs to voltages in excess of VCC.
2. Features and benefits
Input levels:
For 74HC574: CMOS level
For 74HCT574: TTL level
3-state non-inverting outputs for bus oriented applications
8-bit positive, edge-triggered register
Common 3-state output enable input
Complies with JEDEC standard no. 7 A
Multiple package options
ESD protection:
HBM JESD22-A114F exceeds 2 000 V
MM JESD22-A115-A exceeds 200 V
Specified from 40 C to +85 C and from 40 C to +125 C
3. Ordering information
Table 1. Ordering information
Type number Package
Temperature range Name
74HC574D 40 C to +125 C SO20
74HCT574D
74HC574DB 40 C to +125 C SSOP20
74HCT574DB
74HC574PW 40 C to +125 C TSSOP20
74HCT574PW
Description
plastic small outline package; 20 leads;
body width 7.5 mm
plastic shrink small outline package; 20 leads;
body width 5.3 mm
plastic thin shrink small outline package; 20 leads;
body width 4.4 mm
Version
SOT163-1
SOT339-1
SOT360-1
1 page  
NXP Semiconductors
74HC574; 74HCT574
Octal D-type flip-flop; positive edge-trigger; 3-state
Table 5. Recommended operating conditions …continued
Voltages are referenced to GND (ground = 0 V) …continued
Symbol Parameter
Conditions
t/V
input transition rise and fall rate
VCC = 2.0 V
VCC = 4.5 V
VCC = 6.0 V
74HC574
Min Typ Max
- - 625
- 1.67 139
- - 83
74HCT574
Min Typ Max
---
- 1.67 139
---
Unit
ns/V
ns/V
ns/V
9. Static characteristics
Table 6. Static characteristics
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
Symbol Parameter
Conditions
25 C
40 C to +85 C 40 C to +125 C Unit
Min Typ Max Min Max Min Max
74HC574
VIH HIGH-level VCC = 2.0 V
input voltage VCC = 4.5 V
1.5 1.2 -
1.5
-
1.5
-V
3.15 2.4 - 3.15
-
3.15
-V
VCC = 6.0 V
4.2 3.2 -
4.2
-
4.2
-V
VIL LOW-level VCC = 2.0 V
input voltage VCC = 4.5 V
- 0.8 0.5
-
0.5
-
0.5 V
- 2.1 1.35 -
1.35
-
1.35 V
VCC = 6.0 V
- 2.8 1.8
-
1.8
-
1.8 V
VOH HIGH-level
VI = VIH or VIL
output voltage
IO = 20 A; VCC = 2.0 V 1.9 2.0
-
1.9
-
1.9
-V
IO = 20 A; VCC = 4.5 V 4.4 4.5 -
4.4
-
4.4
-V
IO = 20 A; VCC = 6.0 V 5.9 6.0 -
5.9
-
5.9
-V
IO = 6.0 mA; VCC = 4.5 V 3.98 4.32 -
3.84
-
3.7
-V
IO = 7.8 mA; VCC = 6.0 V 5.48 5.81 -
5.34
-
5.2
-V
VOL LOW-level
VI = VIH or VIL
output voltage
IO = 20 A; VCC = 2.0 V
- 0 0.1
-
0.1
-
0.1 V
IO = 20 A; VCC = 4.5 V
- 0 0.1
-
0.1
-
0.1 V
IO = 20 A; VCC = 6.0 V
- 0 0.1
-
0.1
-
0.1 V
IO = 6.0 mA; VCC = 4.5 V
- 0.15 0.26
-
0.33
-
0.4 V
IO = 7.8 mA; VCC = 6.0 V
- 0.16 0.26
-
0.33
-
0.4 V
II input leakage VI = VCC or GND;
current
VCC = 6.0 V
- - 0.1 -
1.0
-
1.0 A
IOZ
OFF-state
VI = VIH or VIL; VCC = 6.0 V; -
- 0.5 -
5.0
-
10.0 A
output current VO = VCC or GND
ICC
supply current VI = VCC or GND; IO = 0 A;
-
- 8.0
-
80
-
160 A
VCC = 6.0 V
CI input
capacitance
- 3.5 -
-
-
-
- pF
74HC_HCT574
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 7 — 4 March 2016
© NXP Semiconductors N.V. 2016. All rights reserved.
5 of 18
5 Page 
NXP Semiconductors
74HC574; 74HCT574
Octal D-type flip-flop; positive edge-trigger; 3-state
9,
QHJDWLYH
SXOVH
9
9,
SRVLWLYH
SXOVH
9
90
WI
WU
90
W:
W:
90
WU
WI
90
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9&&
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92
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5/ 6
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RSHQ
DDG
Fig 9.
Test data is given in Table 9.
Definitions test circuit:
RT = Termination resistance should be equal to output impedance Zo of the pulse generator.
CL = Load capacitance including jig and probe capacitance.
RL = Load resistance.
S1 = Test selection switch.
Test circuit for measuring switching times
Table 9. Test data
Type
Input
74HC574
74HCT574
VI
VCC
3V
tr, tf
6 ns
6 ns
Load
CL
15 pF, 50 pF
15 pF, 50 pF
RL
1 k
1 k
S1 position
tPHL, tPLH
open
open
tPZH, tPHZ
GND
GND
tPZL, tPLZ
VCC
VCC
74HC_HCT574
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 7 — 4 March 2016
© NXP Semiconductors N.V. 2016. All rights reserved.
11 of 18
11 Page | ||
| Páginas | Total 18 Páginas | |
| PDF Descargar | [ Datasheet 74HC574.PDF ] | |
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