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Número de pieza NX5P2925C
Descripción Logic controlled high-side power switch
Fabricantes NXP Semiconductors 
Logotipo NXP Semiconductors Logotipo



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NX5P2925C
Logic controlled high-side power switch
Rev. 1 — 7 July 2015
Product data sheet
1. General description
The NX5P2925C is a high-side load switch which features a low ON resistance N-channel
MOSFET with controlled slew rate that supports 2.5 A of continuous current. Designed for
operation from 0.8 V to 5.5 V, it is used in power domain isolation applications to reduce
power dissipation and extend battery life. The enable logic includes integrated logic level
translation making the device compatible with lower voltage processors and controllers.
The NX5P2925C is ideal for portable, battery operated applications due to low ground
current.
NX5P2925C features reverse current protection (RCP) circuits. If VOUT exceeds VIN by
25 mV, the RCP circuit isolates VOUT from VIN, preventing damage to devices on the
input side of the switch.
2. Features and benefits
Wide supply voltage range from 0.8 V to 5.5 V
Very low ON resistance:
18 m(typical) at a supply voltage of 1.2 V
18 m(typical) at a supply voltage of 1.8 V
High noise immunity
High current handling capability (2.5 A continuous current)
Reverse current protection
Turn-on slew rate limiting
ESD protection:
HBM JESD22-A114F Class 3A exceeds 5000 V
CDM AEC-Q100-011 revision B exceeds 1000 V
Specified from 40 C to +85 C
3. Applications
Cell phone
Digital cameras and audio devices
Portable and battery-powered equipment

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NX5P2925C pdf
NXP Semiconductors
NX5P2925C
Logic controlled high-side power switch
10. Limiting values
Table 5. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol
Parameter
Conditions
Min Max Unit
VI input voltage
input EN
input VIN
[1] 0.5
[2] 0.5
VI(VIN)
+6.0
V
V
VSW
IIK
ISK
ISW
switch voltage
input clamping current
switch clamping current
switch current
output VOUT
input EN: VI(EN) < 0.5 V
input VIN: VI(VIN) < 0.5 V
output VOUT: VO(VOUT) < 0.5 V
output VOUT: VO(VOUT) > VI(VIN) 0.5 V
VSW > 0.5 V
pulsed, 100 ms pulse, 2 % duty cycle
[2] 0.5
50
50
50
-
-
-
VI(VIN)
-
-
-
50
2500
5000
V
mA
mA
mA
mA
mA
mA
Tj(max)
maximum junction
temperature
40
+125
C
Tstg storage temperature
Ptot total power dissipation
65
[3] -
+150
470
C
mW
[1] The minimum input voltage rating may be exceeded if the input current rating is observed.
[2] The minimum and maximum switch voltage ratings may be exceeded if the switch clamping current rating is observed.
[3] The (absolute) maximum power dissipation depends on the junction temperature Tj. Higher power dissipation is allowed in conjunction
with lower ambient temperatures. The conditions to determine the specified values are Tamb = 85 °C and the use of a two layer PCB.
11. Recommended operating conditions
Table 6. Recommended operating conditions
Symbol Parameter
Conditions
VI input voltage
input EN
input VIN
Tamb
ambient temperature
Min Max Unit
0
VI(VIN)
V
0.8 5.5 V
40 +85 C
NX5P2925C
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 7 July 2015
© NXP Semiconductors N.V. 2015. All rights reserved.
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NX5P2925C arduino
NXP Semiconductors
NX5P2925C
Logic controlled high-side power switch
14.1 Waveforms, graphs and test circuit
(1LQSXW
9,
*1'
92+
9287RXWSXW
*1'
90
WRQ
WHQ
9<
9;
W7/+
WRII
WGLV
9<
9;
W7+/
DDD
Measurement points are given in Table 11.
Logic level: VOH is the typical output voltage that occurs with the output load.
Fig 15. Switching times
Table 11. Measurement points
Supply voltage
VI(VIN)
1.0 V to 5.5 V
EN Input
VM
0.5 VI(EN)
Output
VX
0.1 VOH
VY
0.9 VOH
(1
9287
* 9, 5/ &/
9,1
9(;7
Test data is given in Table 12.
Definitions test circuit:
RL = Load resistance.
CL = Load capacitance including jig and probe capacitance.
VEXT = External voltage for measuring switching times.
Fig 16. Test circuit for measuring switching times
Table 12. Test data
Supply voltage
VEXT
1.0 V to 5.5 V
Input
VI(EN)
VI(VIN)
DDD
Load
CL
0.1 F
RL
10
NX5P2925C
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 7 July 2015
© NXP Semiconductors N.V. 2015. All rights reserved.
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