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PDF A5268 Data sheet ( Hoja de datos )
| Número de pieza | A5268 | |
| Descripción | 340KHz Synchronous Rectified Step-Down Converter | |
| Fabricantes | ANPEC | |
| Logotipo |  |
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A5268
3A, 28V, 340KHz Synchronous
Rectified Step-Down Converter
n General Description
n Features
The A5268 is a fixed frequency monolithic synchro-
nous buck regulator that accepts input voltage from 4.75V
to 28V. Two NMOS switches with low on-resistance are
integrated on the die. Current mode topology is used for
fast transient response and good loop stability.
Shutdown mode reduces the input supply current to less
than 1µA. An adjustable soft-start prevents inrush current
at turn-on.
This device is available in SOP-8/PP package with ex-
posed pad for low thermal resistance.
n Applications
l Distributed Power System
l Networking System
l FPGA, DSP, ASIC Power Supplies
l Notebook Computers
l 3A Output Current
l Wide 4.75V to 28V Operating Input Range
l Integrated Power MOSFET Switches
l Output Adjustable from 0.925V to 25V
l Up to 95% Efficiency
l Programmable Soft Start
l Stable with Low ESR Ceramic Output
Capacitors
l Cycle-by Cycle Over Current Protection
l Fixed 340KHz Frequency
l Input Under Voltage Lockout
l System Protected by Over-current Limiting,
Over-voltage Protection and Thermal Shut-
down
l Thermally Enhanced SOP-8/PP Package
l Green Products Meet RoHS Standards
C n Typical Application
i e VIN
12V
C5
10nF
C1
10µF/35V
x2
C4
0.1µ F
R4
100KΩ
IN BS
EN SW
A5268
L1
15µH/3.4A
VOUT
5V
3A
SS SFB
GND COMP
R1
C3 44.2KΩ1%
3.3nF
R2
R3 10KΩ1%
6.98KΩ1%
C2
22µF/10V
x2
Rev.B.02
1
1 page  
A5268
3A, 28V, 340KHz Synchronous
Rectified Step-Down Converter
n Absolute Maximum Ratings
Parameter
Supply Voltage
Switch Voltage
Boost Switch Voltage
All Other Pins
EN Voltage
ESD Classification (HBM)
ESD Classification (MM)
Maximum
-0.3V to +30V
-1V to VIN+0.3
-0.3V to VSW + 6
-0.3V to +6
-0.3V to VIN
2
200
n Recommended Operating Conditions
Parameter
Ambient Temperature Range
Junction Temperature Range
Storage Temperature Range
Rating
-40 to +85
-40 to +125
C -65 to +150
Unit
V
V
V
V
V
kV
v
Unit
oC
oC
oC
ie
Rev.B.02
5
5 Page 
A5268
3A, 28V, 340KHz Synchronous
Rectified Step-Down Converter
n Detailed Description (Contd.)
Compensation Components
A5268 has current mode control for easy compensa-
tion and fast transient response. The system stability and
transient response are controlled through the C pin.
OMP
COMP is the output of the internal transconductance error
amplifier. A series capacitor-resistor combination sets a
pole-zero combination to govern the characteristics of the
control system. The DC gain of the voltage feedback loop
is given by:
AVDC = RLOAD × GCS × AEA × VFB
VOUT
Where V is the feedback voltage (0.925V), A is the
FB VEA
error amplifier voltage gain, GCS is the current sense
transconductance and RLOAD is the load resistor value. The
system has two poles of importance. One is due to the
output capacitor and the load resistor, and the other is due
to the compensation capacitor (C3) and the output resistor
of the error amplifier. These poles are located at:
fP1 =
GEA
2π × C3× AVEA
In this case, a third pole set by the compensation ca-
pacitor (C6) and the compensation resistor (R3) is used
to compensate the effect of the ESR zero on the loop
gain. This pole is located at:
fP3 =
1
2π × C6 × R3
The goal of compensation design is to shape the con-
verter transfer function to get a desired loop gain. The
system crossover frequency where the feedback loop has
the unity gain is important. Lower crossover frequencies
result in slower line and load transient responses, while
higher crossover frequencies could cause system insta-
bility. A good standard is to set the crossover frequency
below one-tenth of the switching frequency. To optimize
the compensation components, the following procedure
can be used.
1. Choose the compensation resistor (R3) to set
the desired crossover frequency.
Determine R3 by the following equation:
fP2 =
1
2π × C 2 × RLOAD
C
Where GEA is the error amplifier transconductance.
The system has one zero of importance, due to the com-
pensation capacitor (C3) and the compensation resistoire
(R3). This zero is located at:
fZ1 =
1
2π × C3× R3
The system may have another zero of importance, if the
output capacitor has a large capacitance and/or a high ESR
value. The zero, due to the ESR and capacitance of the
output capacitor, is located at:
fESR =
1
2π × C2 × RESR
R3 = 2π × C2 × fC × VOUT < 2π × C2 × 0.1× fs × VOUT
GEA × GCS
VFB
GEA × GCS
VFB
Where fC is the desired crossover frequency which is
typically below one tenth of the switching frequency.
2. Choose the compensation capacitor (C3) to achieve
the desired phase margin. For applications with typical
inductor values, setting the compensation zero (fZ1) be-
low one-forth of the crossover frequency provides suffi-
cient phase margin.
Determine C3 by the following equation:
C3 >
4
2π × R3× fC
Where R3 is the compensation resistor.
Rev.B.02
11
11 Page | ||
| Páginas | Total 16 Páginas | |
| PDF Descargar | [ Datasheet A5268.PDF ] | |
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