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PDF NX3L2T384 Data sheet ( Hoja de datos )
| Número de pieza | NX3L2T384 | |
| Descripción | Dual low-ohmic single-pole single-throw analog switch | |
| Fabricantes | NXP Semiconductors | |
| Logotipo |  |
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NX3L2T384
Dual low-ohmic single-pole single-throw analog switch
Rev. 5 — 8 February 2013
Product data sheet
1. General description
The NX3L2T384 is a dual low-ohmic single-pole single-throw analog switch. Each switch
has two input/output terminals (nY and nZ) and an active LOW enable input (nE). When
pin nE is HIGH, the analog switch is turned off.
Schmitt trigger action at the enable input (nE) makes the circuit tolerant to slower input
rise and fall times. A low input voltage threshold allows pin nE to be driven by lower level
logic signals without a significant increase in supply current ICC. This makes it possible for
the NX3L2T384 to switch 4.3 V signals with a 1.8 V digital controller, eliminating the need
for logic level translation.
The NX3L2T384 allows signals with amplitude up to VCC to be transmitted from nY to nZ;
or from nZ to nY. Its low ON resistance (0.5 ) and flatness (0.13 ) ensures minimal
attenuation and distortion of transmitted signals.
2. Features and benefits
Wide supply voltage range from 1.4 V to 4.3 V
Very low ON resistance (peak):
1.6 (typical) at VCC = 1.4 V
1.0 (typical) at VCC = 1.65 V
0.55 (typical) at VCC = 2.3 V
0.50 (typical) at VCC = 2.7 V
0.50 (typical) at VCC = 4.3 V
High noise immunity
ESD protection:
HBM JESD22-A114F Class 3A exceeds 7500 V
MM JESD22-A115-A exceeds 200 V
CDM AEC-Q100-011 revision B exceeds 1000 V
IEC61000-4-2 contact discharge exceeds 4000 V for switch ports
CMOS low-power consumption
Latch-up performance exceeds 100 mA per JESD 78B Class II Level A
1.8 V control logic at VCC = 3.6 V
Control input accepts voltages above supply voltage
Very low supply current, even when input is below VCC
High current handling capability (350 mA continuous current under 3.3 V supply)
Specified from 40 C to +85 C and from 40 C to +125 C
1 page  
NXP Semiconductors
NX3L2T384
Dual low-ohmic single-pole single-throw analog switch
11. Static characteristics
Table 7. Static characteristics
At recommended operating conditions; voltages are referenced to GND (ground 0 V).
Symbol Parameter Conditions
Tamb = 25 C
Min Typ Max
VIH
VIL
II
IS(OFF)
IS(ON)
ICC
ICC
CI
CS(OFF)
CS(ON)
HIGH-level
input voltage
LOW-level
input voltage
input leakage
current
OFF-state
leakage
current
ON-state
leakage
current
supply current
additional
supply current
input
capacitance
VCC = 1.4 V to 1.6 V
VCC = 1.65 V to 1.95 V
VCC = 2.3 V to 2.7 V
VCC = 2.7 V to 3.6 V
VCC = 3.6 V to 4.3 V
VCC = 1.4 V to 1.6 V
VCC = 1.65 V to 1.95 V
VCC = 2.3 V to 2.7 V
VCC = 2.7 V to 3.6 V
VCC = 3.6 V to 4.3 V
enable input nE;
VI = GND to 4.3 V;
VCC = 1.4 V to 4.3 V
nY port; see Figure 6
VCC = 1.4 V to 3.6 V
VCC = 3.6 V to 4.3 V
nZ port; see Figure 7
VCC = 1.4 V to 3.6 V
VCC = 3.6 V to 4.3 V
VI = VCC or GND;
VSW = GND or VCC
VCC = 3.6 V
VCC = 4.3 V
VSW = GND or VCC
VI = 2.6 V; VCC = 4.3 V
VI = 2.6 V; VCC = 3.6 V
VI = 1.8 V; VCC = 4.3 V
VI = 1.8 V; VCC = 3.6 V
VI = 1.8 V; VCC = 2.5 V
OFF-state
capacitance
ON-state
capacitance
0.9 -
-
0.9 -
-
1.1 -
-
1.3 -
-
1.4 -
-
- - 0.3
- - 0.4
- - 0.4
- - 0.5
- - 0.6
---
- - 5
- - 10
- - 5
- - 10
- - 100
- - 150
- 2.0 4.0
- 0.35 0.7
- 7.0 10.0
- 2.5 4.0
- 50 200
- 1.0 -
- 35 -
- 110 -
Tamb = 40 C to +125 C Unit
Min Max Max
(85 C) (125 C)
0.9 -
-V
0.9 -
-V
1.1 -
-V
1.3 -
-V
1.4 -
-V
- 0.3 0.3 V
- 0.4 0.3 V
- 0.4 0.4 V
- 0.5 0.5 V
- 0.6 0.6 V
- 0.5 1 A
- 50 500 nA
- 50 500 nA
- 50 500 nA
- 50 500 nA
- 690 6000 nA
- 800 7000 nA
- 7 7 A
- 1 1 A
- 15 15 A
- 5 5 A
- 300 500 nA
- - - pF
- - - pF
- - - pF
NX3L2T384
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 5 — 8 February 2013
© NXP B.V. 2013. All rights reserved.
5 of 20
5 Page 
NXP Semiconductors
NX3L2T384
Dual low-ohmic single-pole single-throw analog switch
12.2 Additional dynamic characteristics
Table 12. Additional dynamic characteristics
At recommended operating conditions; voltages are referenced to GND (ground = 0 V); VI = GND or VCC (unless otherwise
specified); tr = tf 2.5 ns.
Symbol Parameter
Conditions
Tamb = 25 C
Unit
Min Typ Max
THD
total harmonic
distortion
fi = 20 Hz to 20 kHz; RL = 32 ; see Figure 18
VCC = 1.4 V; VI = 1 V (p-p)
[1]
- 0.15 -
%
VCC = 1.65 V; VI = 1.2 V (p-p)
- 0.10 -
%
VCC = 2.3 V; VI = 1.5 V (p-p)
- 0.02 -
%
VCC = 2.7 V; VI = 2 V (p-p)
- 0.02 -
%
VCC = 4.3 V; VI = 2 V (p-p)
- 0.02 -
%
f(3dB)
iso
3 dB frequency
response
isolation (OFF-state)
RL = 50 ; see Figure 19
VCC = 1.4 V to 4.3 V
fi = 100 kHz; RL = 50 ; see Figure 20
[1]
- 60 - MHz
[1]
VCC = 1.4 V to 4.3 V
- 90 - dB
Vct crosstalk voltage
between digital inputs and switch;
fi = 1 MHz; CL = 50 pF; RL = 50 ; see Figure 21
VCC = 1.4 V to 3.6 V
- 0.2 - V
VCC = 3.6 V to 4.3 V
- 0.2 - V
Xtalk crosstalk
between switches;
fi = 100 kHz; RL = 50 ; see Figure 22
[1]
VCC = 1.4 V to 4.3 V
- 90 - dB
Qinj charge injection
fi = 1 MHz; CL = 0.1 nF; RL = 1 M; Vgen = 0 V;
Rgen = 0 ; see Figure 23
VCC = 1.5 V
- 3 - pC
VCC = 1.8 V
- 3 - pC
VCC = 2.5 V
- 3 - pC
VCC = 3.3 V
- 3 - pC
VCC = 4.3 V
- 6 - pC
[1] fi is biased at 0.5VCC.
13. Test circuits
VIL nE
nY/nZ
fi
VCC
0.5VCC
nZ/nY
RL
D
Fig 18. Test circuit for measuring total harmonic distortion
001aaj524
NX3L2T384
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 5 — 8 February 2013
© NXP B.V. 2013. All rights reserved.
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