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PDF NX3DV42 Data sheet ( Hoja de datos )
| Número de pieza | NX3DV42 | |
| Descripción | Dual high-speed USB 2.0 double-pole double-throw analog switch | |
| Fabricantes | NXP Semiconductors | |
| Logotipo |  |
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NX3DV42
Dual high-speed USB 2.0 double-pole double-throw analog
switch
Rev. 3 — 13 February 2013
Product data sheet
1. General description
The NX3DV42 is a double-pole double-throw analog switch suitable for use as an analog
or digital multiplexer/demultiplexer. Its wide bandwidth and low bit-to-bit skew allows the
NX3DV42 to pass high-speed differential signals with good signal integrity. Its high
channel to channel crosstalk rejection results in minimal noise interference. The
bandwidth is wide enough to pass high-speed USB 2.0 differential signals (480 Mb/s). It
consist of two switches, each with two independent input/outputs (HSDn+ and HSDn)
and a common input/output (D+ or D). One digital input (S) is used to select the switch
position. When pin OE is HIGH, the switches are turned off. Schmitt trigger action at the
select input (S) and output enable input (OE) makes the circuit tolerant to slower input rise
and fall times across the entire VCC range from 3.0 V to 4.3 V.
2. Features and benefits
Supply voltage range from 3.0 V to 4.3 V
4 typical ON resistance
7.3 pF typical ON capacitance
950 MHz typical bandwidth or data frequency
Low crosstalk of 30 dB at 240 MHz
Break-before-make switching
ESD protection:
HBM JESD22-A114F Class 3A exceeds 4000 V
CDM AEC-Q100-011 revision B exceeds 1000 V
HBM exceeds 12000 V for power to GND protection
Latch-up performance exceeds 100 mA per JESD 78 Class II Level A
Specified from 40 C to +125 C
3. Applications
Cell phone, PDA, digital camera and notebook
LCD monitor, TV and set-top box
1 page  
NXP Semiconductors
NX3DV42
Dual high-speed USB 2.0 double-pole double-throw analog switch
Table 7. Static characteristics …continued
At recommended operating conditions; voltages are referenced to GND (ground 0 V).
Symbol Parameter Conditions
Tamb = 40 C to +85 C
Min Typ[1] Max
IS(OFF)
OFF-state
leakage
current
VCC = 4.3 V; see Figure 4 and
Figure 7
- - 1
IOFF power-off
leakage
current
VI or VO = 0 V to 4.3 V;
VCC = 0 V; see Figure 8
- - 1
ICC supply current VI = VCC or GND; VCC = 4.3 V; - - 1
VSW = GND or VCC; see
Figure 6
ICC
CI
additional
VI = 2.6 V; VCC = 4.3 V;
supply current VSW = GND or VCC
VI = 1.8 V; VCC = 4.3 V;
VSW = GND or VCC
input
pins S and OE
capacitance
- - 10
- - 15
- 1.0 -
CS(OFF)
CS(ON)
OFF-state
capacitance
ON-state
capacitance
pins HSDn+ and HSDn
VCC = 3.3 V; VI = 0 V to 3.3 V
pins D+ and DVCC = 3.3 V;
VI = 0 V to 3.3 V
- 2.8 -
- 7.3 -
Tamb = 40 C to +125 C Unit
Min Max
- 2 A
- 10 A
- 10 A
- 10 A
- 15 A
- - pF
- - pF
- - pF
[1] Typical values are measured at Tamb = 25 C and VCC = 3.3 V.
11.1 Test circuit and graphs
VCC
VIL or VIH
VIH
VI
S
D-
OE
HSD1- 1
HSD2- 2
GND
switch IS
Fig 4.
VI = VCC or GND and VO = GND or VCC.
Test circuit also applies for D+, HSD1+ and HSD2+.
Test circuit for measuring OFF-state leakage current
switch
1
2
S
VIL
VIH
VO
aaa-001365
NX3DV42
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 3 — 13 February 2013
© NXP B.V. 2013. All rights reserved.
5 of 19
5 Page 
NXP Semiconductors
NX3DV42
Dual high-speed USB 2.0 double-pole double-throw analog switch
12.3 Test circuits
VIL or VIH
VIL
VCC
S
D-
OE
HSD1- 1
HSD2- 2
fi
GND
0.5VCC
switch
RL
switch
1
2
S
VIL
VIH
CL dB
aaa-001360
Adjust fi voltage to obtain 0 dBm level at output. Increase fi frequency until dB meter reads 3 dB.
Test circuit also applies for D+, HSD1+ and HSD2+.
Fig 14. Test circuit for measuring the frequency response when channel is in ON-state
0.5VCC
RL VCC
VIL or VIH
VIH
fi
S
D-
OE
HSD1- 1
HSD2- 2
GND
Adjust fi voltage to obtain 0 dBm level at input.
Test circuit also applies for D+, HSD1+ and HSD2+.
Fig 15. Test circuit for measuring isolation (OFF-state)
0.5VCC
RL
switch
switch
1
2
S
VIH
VIL
dB
aaa-001367
NX3DV42
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 3 — 13 February 2013
© NXP B.V. 2013. All rights reserved.
11 of 19
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| Páginas | Total 19 Páginas | |
| PDF Descargar | [ Datasheet NX3DV42.PDF ] | |
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