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PDF RFM66W Data sheet ( Hoja de datos )

Número de pieza RFM66W
Descripción ISM TRANSCEIVER MODULE
Fabricantes HOPERF 
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RFM66W
RFM66W ISM TRANSCEIVER MODULE v1.0
868 & 915MHz Ultra Low Power High Link Budget Integrated UHF Transceiver
GENERAL DESCRIPTION
TAL
The RFM66W is a fully integrated ISM band
transceiver optimized for use in the (EN 300 220-1) 868
MHz band in Europe and the (FCC Part 15) 915 MHz band
in the US with a minimum of external components. It offers
a combination of high link budget and low current
consumption in all operating modes. The 143 dB link
budget is achieved by a low noise CMOS receiver front end
and up to +20 dBm of transmit output power. A pair of
internal power amplifiers are provided permitting either fully
regulated - for constant RF performance, or direct supply
connection - for optimal efficiency. This makes RFM66W
ideal for either M2M applications powered by alkaline
battery chemistries or long battery life metering applications
using Lithium battery chemistries.
The Low-IF architecture of the RFM66W sees fast
transceiver start times and demodulation predicated
towards low modulation index and gaussian filtered
spectrally efficient modulation formats.
KEY PRODUCT FEATURES
+20 dBm - 100 mW Constant RF output vs. Vsupply
+14 dBm high efficiency PA
Programmable bit rate up to 300kbps
High Sensitivity: down to -123 dBm at 1.2 kbps
Bullet-proof front end: IIP3 = -12 dBm
80 dB Blocking Immunity
Low RX current of 9.3 mA, 100nA register retention
Fully integrated synthesizer with a resolution of 61 Hz
FSK, GFSK, MSK, GMSK and OOK modulations
Built-in Bit Synchronizer performing Clock Recovery
Sync Word Recognition
Preamble detection
io-homecontrol® compatibility mode
115 dB+ Dynamic Range RSSI
Automatic RF Sense with ultra-fast AFC
Packet engine up to 64 bytes with CRC
Built-in temperature sensor and Low Battery indicator
Module Size:19.7X16mm
RFM66W
APPLICATIONS
Wireless Sensor Networks
Automated Meter Reading
Home and Building Automation
Wireless Alarm and Security Systems
Industrial Monitoring and Control
Tel: +86-755-82973805 Fax: +86-755-82973550 E-mail: [email protected] http://www.hoperf.comPage 1

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RFM66W pdf
WIRELESS & SENSING
RFM66W
DATASHEET
List of Figures
Section
Page
Figure 1. Block Diagram ................................................................................................................................................ 9
Figure 2. Pin Diagram .................................................................................................................................................. 10
Figure 3. Marking Diagram .......................................................................................................................................... 10
Figure 4. Simplified RFM66W Block Schematic Diagram .............................................................................................. 17
Figure 5. TCXO Connection ........................................................................................................................................ 19
Figure 6. Typical Phase Noise Performances of the Low Consumption and Low Phase Noise PLLs. ....................... 20
Figure 7. RF Front-end Architecture Shows the Internal PA Configuration. ............................................................... 22
Figure 8. Receiver Block Diagram ............................................................................................................................... 27
Figure 9. Receiver Startup Process. ............................................................................................................................ 29
Figure 10. OOK Peak Demodulator Description .......................................................................................................... 32
Figure 11. Floor Threshold Optimization ..................................................................................................................... 33
Figure 12. Bit Synchronizer Description ...................................................................................................................... 34
Figure 13. FEI Process ................................................................................................................................................ 35
Figure 14. Temperature Sensor Response ................................................................................................................. 37
Figure 15. Startup Process .......................................................................................................................................... 38
Figure 16. Sequencer Transitions From Idle State ...................................................................................................... 42
Figure 17. Sequencer Transitions From LowPower State ........................................................................................... 43
Figure 18. Sequencer Transitions From Receive State ............................................................................................... 43
Figure 19. Sequencer Transitions From ReceiveRestart State ................................................................................... 44
Figure 20. Sequencer Transitions From PacketReceived State .................................................................................. 44
Figure 21. Sequencer Transitions From Transmit State .............................................................................................. 45
Figure 22. Listen mode Sequence (no wanted signal) ................................................................................................ 46
Figure 23. RFM66W Data Processing Conceptual View ............................................................................................... 47
Figure 24. SPI Timing Diagram (single access) .......................................................................................................... 48
Figure 25. FIFO and Shift Register (SR) ..................................................................................................................... 49
Figure 26. FifoLevel IRQ Source Behavior .................................................................................................................. 50
Figure 27. Sync Word Recognition .............................................................................................................................. 51
Figure 28. Continuous Mode Conceptual View ........................................................................................................... 53
Figure 29. Tx Processing in Continuous Mode ............................................................................................................ 53
Figure 30. Rx Processing in Continuous Mode ........................................................................................................... 54
Figure 31. Packet Mode Conceptual View ................................................................................................................... 55
Figure 32. Fixed Length Packet Format ...................................................................................................................... 56
Figure 33. Variable Length Packet Format .................................................................................................................. 57
Figure 34. Unlimited Length Packet Format ................................................................................................................ 58
Figure 35. Manchester Encoding/Decoding ................................................................................................................. 61
Figure 36. Data Whitening Polynomial ........................................................................................................................ 62
Figure 37. POR Timing Diagram ................................................................................................................................. 81
Figure 38. Manual Reset Timing Diagram ................................................................................................................... 82
Figure 39. Reference Design - Single RF Input/Output, High Efficiency PA ............................................................... 82
Page 5
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RFM66W arduino
RFM66W
1.3. Pin Description
Table 1 RFM66W Pinouts
Number
Name
1 GND
2 MISO
3 MOSI
4 SCK
5 NSS
6 RESET
7 DIO5
8 GND
9 ANT
10 GND
11 DIO3
12 DIO4
13 3.3V
14 DIO0
15 DIO1
16 DIO2
Type
-
I
O
I
I
I/O
I/O
-
-
-
I/O
I/O
-
I/O
I/O
I/O
Description
Description Stand Alone Mode
Ground
SPI Data output
SPI Data input
SPI Clock input
SPI Chip select input
Reset trigger input
Digital I/O, software configured
Ground
RF signal output/input.
Ground
Digital I/O, software configured
Digital I/O, software configured
Supply voltage
Digital I/O, software configured
Digital I/O, software configured
Digital I/O, software configured
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