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PDF FDD86567_F085 Data sheet ( Hoja de datos )
| Número de pieza | FDD86567_F085 | |
| Descripción | MOSFET ( Transistor ) | |
| Fabricantes | Fairchild Semiconductor | |
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FDD86567_F085
N-Channel PowerTrench® MOSFET
60 V, 100 A, 3.2 mΩ
July 2015
Features
Typical RDS(on) = 2.6 mΩ at VGS = 10V, ID = 80 A
Typical Qg(tot) = 63 nC at VGS = 10V, ID = 80 A
UIS Capability
RoHS Compliant
Qualified to AEC Q101
Applications
Automotive Engine Control
PowerTrain Management
Solenoid and Motor Drivers
Integrated Starter/Alternator
Primary Switch for 12V Systems
D
D
G
G
S
DTO-P-2A5K2
(TO-252)
S
For current package drawing, please refer to the Fairchild web‐
site at http://www.fairchildsemi.com/package‐drawings/TO/
TO252A03.pdf.
MOSFET Maximum Ratings TJ = 25°C unless otherwise noted.
Symbol
Parameter
VDSS
VGS
ID
Drain-to-Source Voltage
Gate-to-Source Voltage
Drain Current - Continuous (VGS=10) (Note 1)
Pulsed Drain Current
EAS Single Pulse Avalanche Energy
PD
Power Dissipation
Derate Above 25oC
TJ, TSTG
RθJC
RθJA
Operating and Storage Temperature
Thermal Resistance, Junction to Case
Maximum Thermal Resistance, Junction to Ambient
TC = 25°C
TC = 25°C
(Note 2)
(Note 3)
Ratings
60
±20
100
See Figure 4
115
227
1.52
-55 to + 175
0.66
52
Units
V
V
A
mJ
W
W/oC
oC
oC/W
oC/W
Notes:
1: Current is limited by bondwire configuration.
2: Starting TJ = 25°C, L = 40μH, IAS = 76A, VDD = 60V during inductor charging and VDD = 0V during time in avalanche.
3: RθJA is the sum of the junction-to-case and case-to-ambient thermal resistance, where the case thermal reference is defined as the solder
mounting surface
presented here is
of the
based
drain pins. RθJC is
on mounting on a 1
guaranteed by design,
in2 pad of 2oz copper.
while
RθJAis
determined
by
the
board
design.
The maximum rating
Package Marking and Ordering Information
Device Marking
FDD86567
Device
FDD86567_F085
Package
D-PAK(TO-252)
Reel Size
13”
Tape Width
16mm
Quantity
2500units
©2015 Fairchild Semiconductor Corporation
FDD86567_F085 Rev. 1.0
1
www.fairchildsemi.com
1 page  
Typical Characteristics
50
ID = 80A
40
PULSE DURATION = 80μs
DUTY CYCLE = 0.5% MAX
30
TJ = 175oC
TJ = 25oC
20
10
0
2468
VGS, GATE TO SOURCE VOLTAGE (V)
Figure 11. RDSON vs. Gate Voltage
10
2.4
PULSE DURATION = 80μs
DUTY CYCLE = 0.5% MAX
2.0
1.6
1.2
0.8
0.4
-80
ID = 80A
VGS = 10V
-40 0 40 80 120 160 200
TJ, JUNCTION TEMPERATURE(oC)
Figure 12. Normalized RDSON vs. Junction
Temperature
1.5
VGS = VDS
ID = 250μA
1.2
0.9
0.6
0.3
0.0
-80
-40 0 40 80 120 160 200
TJ, JUNCTION TEMPERATURE(oC)
Figure 13. Normalized Gate Threshold Voltage vs.
Temperature
1.10
ID = 5mA
1.05
1.00
0.95
0.90
-80
-40 0 40 80 120 160 200
TJ, JUNCTION TEMPERATURE (oC)
Figure 14. Normalized Drain to Source
Breakdown Voltage vs. Junction Temperature
10000
1000
Ciss
Coss
100
f = 1MHz
Crss
VGS = 0V
10
0.1 1 10 100
VDS, DRAIN TO SOURCE VOLTAGE (V)
Figure 15. Capacitance vs. Drain to Source
Voltage
10
ID = 80A
8
6
VDD = 30V
VDD =24V
VDD = 36V
4
2
0
0 20 40 60 80
Qg, GATE CHARGE(nC)
Figure 16. Gate Charge vs. Gate to Source
Voltage
©2015 Fairchild Semiconductor Corporation
FDD86567_F085 Rev. 1.0
5
www.fairchildsemi.com
5 Page | ||
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| PDF Descargar | [ Datasheet FDD86567_F085.PDF ] | |
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