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PDF IRL530S Data sheet ( Hoja de datos )
| Número de pieza | IRL530S | |
| Descripción | Power MOSFET ( Transistor ) | |
| Fabricantes | Vishay | |
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Power MOSFET
IRL530S, SiHL530S
Vishay Siliconix
PRODUCT SUMMARY
VDS (V)
RDS(on) ()
Qg (Max.) (nC)
100
VGS = 5.0 V
28
Qgs (nC)
3.8
Qgd (nC)
14
Configuration
Single
0.16
D2PAK (TO-263)
D
GD
S
G
S
N-Channel MOSFET
ORDERING INFORMATION
Package
Lead (Pb)-free and Halogen-free
Lead (Pb)-free
Note
a. See device orientation.
FEATURES
• Halogen-free According to IEC 61249-2-21
Definition
• Surface Mount
• Available in Tape and Reel
• Dynamic dV/dt Rating
• Repetitive Avalanche Rated
• Logic Level Gate Drive
• RDS(on) Specified at VGS = 4 V and 5 V
• 175 °C Operating Temperature
• Compliant to RoHS Directive 2002/95/EC
DESCRIPTION
Third generation Power MOSFETs from Vishay provide the
designer with the best combination of fast switching,
ruggedized device design, low on-resistance and
cost-effectiveness.
The D2PAK (TO-263) is a surface mount power package
capable of accommodating die sizes up to HEX-4. It
provides the highest power capability and the lowest
possible on resistance in any existing surface mount
package. The D2PAK (TO-263) is suitable for high current
applications because of its low internal connection
resistance and can dissipate up to 2.0 W in a typical surface
mount application.
D2PAK (TO-263)
SiHL530STRR-GE3a
IRL530STRRPbFa
SiHL530STR-E3a
ABSOLUTE MAXIMUM RATINGS (TC = 25 °C, unless otherwise noted)
PARAMETER
SYMBOL
Drain-Source Voltage
VDS
Gate-Source Voltage
VGS
Continuous Drain Current
Pulsed Drain Currenta
VGS at 5 V
TC = 25 °C
TC = 100 °C
ID
IDM
Linear Derating Factor
Linear Derating Factor (PCB Mount)e
Single Pulse Avalanche Energyb
Repetitive Avalanche Currenta
Repetitive Avalanche Energya
EAS
IAR
EAR
Maximum Power Dissipation
Maximum Power Dissipation (PCB Mount)e
Peak Diode Recovery dV/dtc
TC = 25 °C
TA = 25 °C
PD
dV/dt
Operating Junction and Storage Temperature Range
Soldering Recommendations (Peak Temperature)
for 10 s
TJ, Tstg
Notes
a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11).
b. VDD = 25 V, starting TJ = 25 °C, L = 1.9 mH, Rg = 25 , IAS = 15 A (see fig. 12).
c. ISD 15 A, dI/dt 140 A/μs, VDD VDS, TJ 175 °C.
d. 1.6 mm from case.
e. When mounted on 1" square PCB (FR-4 or G-10 material).
LIMIT
100
± 10
15
11
60
0.59
0.025
290
15
8.8
88
3.7
5.5
- 55 to + 175
300d
UNIT
V
A
W/°C
mJ
A
mJ
W
V/ns
°C
* Pb containing terminations are not RoHS compliant, exemptions may apply
Document Number: 91342
S11-1055-Rev. C, 30-May-11
www.vishay.com
1
This document is subject to change without notice.
THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
1 page  
Fig. 9 - Maximum Drain Current vs. Case Temperature
IRL530S, SiHL530S
Vishay Siliconix
VDS
VGS
Rg
RD
D.U.T.
5V
Pulse width ≤ 1 µs
Duty factor ≤ 0.1 %
+- VDD
Fig. 10a - Switching Time Test Circuit
VDS
90 %
10 %
VGS
td(on) tr
td(off) tf
Fig. 10b - Switching Time Waveforms
Fig. 11 - Maximum Effective Transient Thermal Impedance, Junction-to-Case
Document Number: 91342
S11-1055-Rev. C, 30-May-11
www.vishay.com
5
This document is subject to change without notice.
THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
5 Page | ||
| Páginas | Total 10 Páginas | |
| PDF Descargar | [ Datasheet IRL530S.PDF ] | |
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