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PDF LV24250LS Data sheet ( Hoja de datos )

Número de pieza LV24250LS
Descripción 1-Chip FM Tuner IC
Fabricantes ON Semiconductor 
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No Preview Available ! LV24250LS Hoja de datos, Descripción, Manual

Ordering number : ENA1699B
LV24250LS
Bi-CMOS LSI
1-Chip FM Tuner IC
for Compact Portable Equipment
http://onsemi.com
Overview
The LV24250LS is an I2C-controlled single-chip FM tuner IC that integrates external components which are necessary
for tuning in a compact VQLP package with dimensions of only 3.5mm×3.5mm.
Features
FM FE
FM IF
MPX stereo decoder
FLL Tuning
Standby
Specifications
Absolute Maximum Ratings at Ta = 25C
Parameter
Maximum supply voltage
Maximum input voltage
Allowable power dissipation
Operating temperature
Storage temperature
Symbol
VCC max
VDD max
VIN1 max
VIN2 max
Pd max
Topr
Tstg
Conditions
Analog block supply voltage
Digital block supply voltage
SCL, SDA, Int
External_clk_in
Ta 70C *
* : When mounted on the specified printed circuit board (40.0mm × 50.0 mm × 0.8mm), Four layers glass epoxy (2S2P)
Ratings
5.0
4.0
VDD+0.3
VDD+0.3
140
-20 to +70
-40 to +125
Unit
V
V
V
V
mW
C
C
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating
Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability.
Semiconductor Components Industries, LLC, 2013
June, 2013
60811 SY/60910 SY/42810 SY 201003265-S00003 No.A1699-1/18

1 page




LV24250LS pdf
Pin Function
Pin No.
1
2
Pin name
FM-ANT1
FM-ANT2
LV24250LS
Description
Antenna input
For pin 1 single input, pin 2 is set
to AC_GND via capacity
Pin voltage
1V
3
VI/O
Digital interface supply voltage
VI/O
Power pin dedicated to the
interface input/output elements
4
VDD
Digital supply voltage
Power pin for digital block
VDD
5 INT Interrupt line
Output pin dedicated to interrupt
(hardware output: used for
options)
Internal equivalent circuit
Vstabi
Mixer
ANT1
1
1V
Vstabi
1V
ANT2
2
1V
Mixer
1V
VDD
V_I/O
3
to each interface block
VDD
4
to each logic block
VDD
INT
5
VIO
6
SDA
Digital interface DATA ine
Bidirectional data line. Pull up to
Vio line with 3.3kto 10k
resistor
VDD
6
VIO
data
data
7 SCL Digital interface Clock line
8
Package-GND
GND for package-shield
(GND)
9 BND pin for package shield
10
11
12
Ext_CLK_IN
Reference clock-source input
for measurement
External standard CLK input pin.
VDD
7
VIO
SCL
VDD
12
VIO
CLK
Continued on next page.
No.A1699-5/18

5 Page





LV24250LS arduino
LV24250LS
Register 0Dh – RADIO_CTRL1 – Radio control 1 (Read/Write)
7
IF_SEL
bit 7 :
65
IFBWSEL
AGC_SPD
IF_SEL : IF Frequency Setting
0 = 150kHz
1 = 170kHz
4
DEEM
3
ST_M
2
nMUTE
bit 6 :
IFBWSEL : IF band width setting
0 = 50%
1 = 100%
bit 5 :
VOL_2 : Volume setting
For details, refer to Bit0,1 for RADIO_CTRL1
bit 4 :
DEEM : de-emphasis
0 = 50s : Korea, China, Europe, Japan
1 = 75s : USA
bit 3 :
ST_M : Stereo/mono setting
0 = Stereo enabled
1 = Stereo disabled (mono mode)
bit 2 :
nMUTE : Audio Mute
0 = Mute On
1 = Mute Off
bit 1-0 :
VOL [1 : 0] : Volume Setting
* It controls by Bit5 of RADIO_CTRL1 and combination 4Bit with Bit1 of RADIO_CTRL2.
Vol_3 Vol_2 Vol_1 Vol_0
0 0 0 0 : Minimum level
0001
0010
1 1 1 1 : Max level
10
VOL [1 : 0]
Register 0Eh – RADIO_CTRL2 – Radio control 2 (Read/Write)
7
bit 7-5 :
654
SOFTST [2 : 0]
SOFTST [2 : 0] : Soft Stereo setting
000b = Soft stereo level 3
001b = Disable soft stereo
010b = Soft stereo level 1 (*)
100b = Soft stereo level 2
Note : do not use without these value.
(*) : recommended setting
3
SOFTMU [2 : 0]
bit 4-2 :
SOFTMU [2 : 0] : Soft audio mute setting
000b = Soft audio mute level 3
001b = Disable soft audio mute
010b = Soft audio mute level 1
100b = Soft audio mute level 2 (*)
Note : do not use without these value.
(*) : recommended setting
bit 1 :
VOL_3 : Volume setting
For details, refer to Bit0,1 for RADIO_CTRL1
bit 0 :
STABI_BP : Internal regulator by-pass bit
0 = Internal regulator operate (normal)
1 = Internal regulator by-pass
2
10
N/A STABI_BP
No.A1699-11/18

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