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PDF LC75863W Data sheet ( Hoja de datos )

Número de pieza LC75863W
Descripción 1/3 Duty LCD Display Driver
Fabricantes ON Semiconductor 
Logotipo ON Semiconductor Logotipo



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No Preview Available ! LC75863W Hoja de datos, Descripción, Manual

Ordering number : ENN7135A
LC75863W
CMOS IC
1/3 Duty LCD Display Driver
with Key Input Function
http://onsemi.com
Overview
The LC75863W is the 1/3 duty LCD display driver that can directly drive up to 75 segments and can control up to
four general-purpose output ports. This product also incorporates a key scan circuit that accepts input from up to 30
keys to reduce printed circuit board wiring.
Features
Key input function for up to 30 keys (A key scan is performed only when a key is pressed.)
1/3duty - 1/2bias and 1/3duty - 1/3bias drive schemes can be controlled from serial data (up to 75 segments).
Sleep mode and all segments off functions that are controlled from serial data.
Segment output port/general-purpose output port function switching that is controlled from serial data.
Serial data I/O supports CCB format communication with the system controller.
Direct display of display data without the use of a decoder provides high generality.
Independent VLCD for the LCD driver block (VLCD can be set to in the range VDD-0.5 to 6.0 volts.)
Provision of an on-chip voltage-detection type reset circuit prevents incorrect displays.
RC oscillator circuit.
CCB is ON Semiconductor® ’s original format. All addresses are managed
by ON Semiconductor® for this format.
9.0
7.0
36 25
37 24
48
1
(0.75)
0.5
13
12
0.18
0.15
SQFP48(7X7)
SQFP48(7X7)
CCB is a registered trademark of Semiconductor Components Industries, LLC.
ORDERING INFORMATION
See detailed ordering and shipping information on page 25 of this data sheet.
Semiconductor Components Industries, LLC, 2013
October, 2013
O2313HKPC B8-8715/D2001TN(OT) No.7135-1/25

1 page




LC75863W pdf
Pin Assignment
LC75863W
KI5
VDD
VLCD
VLCD1
VLCD2
VSS
TEST
OSC
DO
CE
CL
DI
36
37
48
1
LC75863W
(SQFP48)
25
24 COM1
S23
S22
S21
S20
S19
S18
S17
S16
S15
S14
13 S13
12
Package Dimensions
unit:mm
SPQFP48 7x7 / SQFP48
CASE 131AJ
ISSUE O
Top view
No.7135-5/25

5 Page





LC75863W arduino
Serial Data Output
(1) When CL is stopped at the low level
LC75863W
CE
CL
DI 1 1 0 0 0 0 1 0
B0 B1 B2 B3 A0 A1 A2 A3
DO
X KD1 KD2
Note: B0 to B3, A0 to A3 ··· CCB sddress
(2) When CL is stopped at the high level
KD27 KD28 KD29 KD30 SA
Output data
X don’t care
CE
CL
DI
1100001
0
B0 B1 B2 B3 A0 A1 A2 A3
DO X KD1 KD2 KD3
Note: B0 to B3, A0 to A3 ··· CCB sddress
KD28 KD29 KD30 SA X
Output data
X don’t care
CCB address ····· 43H
KD1 to KD30 ···· Key data
SA ················· Sleep acknowledge data
Note: If a key data read operation is executed when DO is high, the read key data (KD1 to KD30) and sleep
acknowledge data (SA) will be invalid.
Output Data
(1) KD1 to KD30      Key data
When a key matrix of up to 30 keys is formed from the KS1 to KS6 output pins and the KI1 to KI5 input pins and
one of those keys is pressed, the key output data corresponding to that key will be set to 1. The table shows the
relationship between those pins and the key data bits.
KI1 KI2 KI3 KI4 KI5
KS1/S24
KD1
KD2
KD3
KD4
KD5
KS2/S25
KD6
KD7
KD8
KD9
KD10
KS3
KD11
KD12
KD13
KD14
KD15
KS4
KD16
KD17
KD18
KD19
KD20
KS5
KD21
KD22
KD23
KD24
KD25
KS6
KD26
KD27
KD28
KD29
KD30
When the KS1/S24 and KS2/S25 output pins are selected to be segment outputs by control data bits K0 and K1 and
a key matrix of up to 20 keys is formed using the KS3 to KS6 output pins and the KI1 to KI5 input pins, the KD1 to
KD10 key data bits will be set to 0.
(2) SA      Sleep acknowledge data
This output data bit is set to the state when the key was pressed. Also, while DO will be low in this case, if serial
data is input and the mode is set (to normal or sleep mode) during this period, that mode will be set. SA will be 1 in
sleep mode and 0 in normal mode.
No.7135-11/25

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