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74ALVC16374 Datasheet دیتاشیت PDF دانلود

دیتاشیت - ON Semiconductor - Low-Voltage 1.8/2.5/3.3V 16-Bit D-Type Flip-Flop

شماره قطعه 74ALVC16374
شرح مفصل Low-Voltage 1.8/2.5/3.3V 16-Bit D-Type Flip-Flop
تولید کننده ON Semiconductor 
آرم ON Semiconductor 


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74ALVC16374 شرح
74ALVC16374
Low−Voltage 1.8/2.5/3.3 V
16−Bit D−Type Flip−Flop
With 3.6 VTolerant Inputs and Outputs
(3State, NonInverting)
The 74ALVC16374 is an advanced performance, noninverting
16bit Dtype flipflop. It is designed for very highspeed, very
lowpower operation in 1.8 V, 2.5 V or 3.3 V systems. The
ALVC16374 is byte controlled, with each byte functioning identically,
but independently. Each byte has separate Output Enable and Clock
Pulse inputs. These control pins can be tied together for a full 16bit
operation.
The 74ALVC16374 consists of 16 edgetriggered flipflops with
individual Dtype inputs and 3.6 Vtolerant 3state outputs. The
clocks (CPn) and Output Enables (OEn) are common to all flipflops
within the respective byte. The flipflops will store the state of
individual D inputs that meet the setup and hold time requirements on
the LOWtoHIGH Clock (CP) transition. With the OE LOW, the
contents of the flipflops are available at the outputs. When the OE is
HIGH, the outputs go to the high impedance state. The OE input level
does not affect the operation of the flipflops.
Designed for Low Voltage Operation: VCC = 1.653.6 V
3.6 V Tolerant Inputs and Outputs
High Speed Operation: 3.6 ns max for 3.0 to 3.6 V
4.5 ns max for 2.3 to 2.7 V
7.8 ns max for 1.65 to 1.95 V
Static Drive: ±24 mA Drive at 3.0 V
±12 mA Drive at 2.3 V
±4 mA Drive at 1.65 V
Supports Live Insertion and Withdrawal
IOFF Specification Guarantees High Impedance When VCC = 0 V
Near Zero Static Supply Current in All Three Logic States (40 mA)
Substantially Reduces System Power Requirements
Latchup Performance Exceeds ±250 mA @ 125°C
ESD Performance: Human Body Model >2000 V; Machine Model
>200 V
Second Source to Industry Standard 74ALVC16374
†To ensure the outputs activate in the 3state condition, the output enable pins
should be connected to VCC through a pullup resistor. The value of the resistor is
determined by the current sinking capability of the output connected to the OE pin.
http://onsemi.com
MARKING DIAGRAM
48
48
1
TSSOP48
DT SUFFIX
CASE 1201
74ALVC16374DT
AWLYYWW
1
A = Assembly
Location
WL = Wafer Lot
YY = Year
WW = Work Week
PIN NAMES
Pins
Function
OEn
CPn
D0D15
O0O15
Output Enable Inputs
Clock Pulse Inputs
Inputs
Outputs
ORDERING INFORMATION
Device
Package
Shipping
74ALVC16374DTR TSSOP 2500/Tape & Reel
© Semiconductor Components Industries, LLC, 2006
June, 2006 Rev. 1
1
Publication Order Number:
74ALVC16374/D

قانون اساسیصفحه 11
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