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Número de pieza | NCP81246 | |
Descripción | Three-Rail Controller | |
Fabricantes | ON Semiconductor | |
Logotipo | ||
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No Preview Available ! NCP81246
Three-Rail Controller
with Intel Proprietary
Interface for IMVP8 CPU
Applications
The NCP81246 contains a two-phase, and two single-phase buck
regulators optimized for Intel IMVP8 compatible CPUs.
The two-phase controller combines true differential voltage sensing,
differential inductor DCR current sensing, input voltage feed-forward,
and adaptive voltage positioning to provide accurately regulated
power for IMVP8 Rail2.
The two single-phase controllers can be used for Rail1, Rail3 and
Rail4 rails. Both make use of ON Semiconductor’s patented enhanced
RPM operation. RPM control maximizes transient response while
allowing for smooth transitions between discontinuous frequency
scaling operation and continuous mode full power operation. The
single-phase rails have an ultralow offset current monitor amplifier
with programmable offset compensation for ultra high accuracy
current monitoring.
The NCP81246 offers three internal MOSFET drivers with a single
external PWM signal.
Two-Phase Rail Features
• Dual Edge Modulation for Fastest Initial Response to Transient
Loading
• High Performance Operational Error Amplifier
• Digital Soft Start Ramp
• Dynamic Reference Injection® (Patent #US7057381)
• Accurate Total Summing Current Amplifier(Patent #US6683441)
• Dual High Impedance Differential Voltage and Total Current Sense
Amplifiers
• Phase-to-Phase Dynamic Current Balancing
• True Differential Current Balancing Sense Amplifiers for Each Phase
• Adaptive Voltage Positioning (AVP)
• Switching Frequency Range of 300 kHz – 750 kHz
• Vin range 4.5 V to 25 V
• Start-Up into Pre-Charged Loads While Avoiding False OVP
• UltraSonic Operation
• These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS
Compliant
www.onsemi.com
1 52
QFN52
MN SUFFIX
CASE 485BE
MARKING DIAGRAM
NCP81246
FAWLYYWW
G
NCP81246 = Specific Device Code
F = Wafer Fab
A = Assembly Site
WL = Lot ID
YY = Year
WW = Work Week
G = Pb-Free Package
ORDERING INFORMATION
Device
Package
Shipping†
NCP81246MNTXG QFN52 5000 / Tape & Reel
(Pb−Free)
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specification
Brochure, BRD8011/D.
Single-Phase Rail Features
• Enhanced RPM Control System
• Ultra Low Offset IOUT Monitor
• Dynamic VID Feed-Forward
• Programmable Droop Gain
• Zero Droop Capable
• Thermal Monitor
• UltraSonic Operation
• Adjustable Vboot
• Digitally Controlled Operating Frequency
© Semiconductor Components Industries, LLC, 2016
July, 2016 − Rev. 2
1
Publication Order Number:
NCP81246/D
1 page NCP81246
IOUT_2ph
DIFFOUT_2ph/ICCMAX_2ph
FB_2ph
COMP_2ph
ILIM_2ph
CSCOMP_2ph
CSSUM_2ph
CSREF_2ph
CSP2_2ph
CSP1_2ph
TSENSE_2ph
VRMP
VCC
1
2
3
4
5
6
7
8
9
10
11
12
13
NCP81246
TAB: GROUND
(Not to Scale)
39 DRON
38 SCLK
37 ALERT#
36 SDIO
35 VR_HOT#
34 IOUT_1a
33 CSP_1a
32 CSN_1a
31 ILIM_1a
30 COMP_1a
29 VSN_1a
28 VSP_1a
27 TSENSE_1a
Figure 4. Pin Configuration
Table 1. NCP81246 PIN DESCRIPTIONS
Pin No.
Symbol
Description
1
IOUT_2ph
A resistor to ground programs IOUT gain for the two-phase regulator.
2
DIFFOUT_2ph/
Output of the two-phase regulator’s differential remote sense amplifier.
ICCMAX_2ph
During start-up, the two-phase regulator’s ICCMAX is programmed with a pull-down on this pin.
3
FB_2ph
Error amplifier voltage feedback for two-phase regulator.
4
COMP_2ph
Output of the error amplifier and the inverting inputs of the PWM comparators for two-phase
regulator.
5
ILIM_2ph
Over-current threshold setting − programmed with a resistor to CSCOMP_2ph for two-phase
regulator.
6
CSCOMP_2ph
Output of total-current-sense amplifier for two-phase regulator.
7
CSSUM_2ph
Inverting input of total-current-sense amplifier for two-phase regulator.
8
CSREF_2ph
Total-current-sense amplifier reference voltage input for two-phase regulator.
9
CSP2_2ph
Non-inverting input to current-balance amplifier for Phase 2 of the two-phase regulator.
10
CSP1_2ph
Non-inverting input to current-balance amplifier for Phase 1 of the two-phase regulator.
11
TSENSE_2ph
Temperature sense input for the two-phase regulator.
12
VRMP
Feed-forward input of Vin for the ramp-slope compensation. The current fed into this pin is used to
control the ramp of the PWM slopes.
13
VCC
Power for the internal control circuits. A decoupling capacitor is connected from this pin to ground.
14
BST1
High-side bootstrap supply for Phase 1 of the two-phase regulator.
15
HG1
High-side FET gate driver output for Phase 1 of the two-phase regulator.
www.onsemi.com
5
5 Page NCP81246
Table 5. ELECTRICAL CHARACTERISTICS − 2-PHASE RAIL SPECIFIC (continued)
(Unless otherwise stated: −40°C < TA < 100°C; 4.75 V < VCC < 5.25 V; CVCC = 0.1 mF)
Parameter
Test Conditions
Min Typ Max Unit
Iout OUTPUT
Output Offset Current
Output Source Current
Current Gain
VILIM = 5 V
ILIM Source Current = 20 mA
IIOUT / IILIM, RILIM = 20 kW RIOUT = 5 kW
DAC = 0.8 V, 1.25 V, 1.52 V
− − 0.25 mA
− 200 − mA
9.5 10 10.5 A/A
MODULATORS
0% Duty Cycle
Comp Voltage for PWM Held Low
− 1.3 − V
100% Duty Cycle
Comp Voltage for PWM Held High
VRAMP = 12 V
− 2.6 − V
PWM Ramp Duty Cycle Matching
PWM Phase Angle Error
Comp = 2 V, PWM TON Matching
− ±3 − %
− ±15 − °
Ramp Feed Forward Voltage Range
5 − 20 V
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
4. Based on design or characterisation data, not in production test.
Table 6. ELECTRICAL CHARACTERISTICS − SINGLE PHASE RAIL SPECIFIC
(Unless otherwise stated: −40°C < TA < 100°C; 4.75 V < VCC < 5.25 V; CVCC = 0.1 mF)
Parameter
Test Conditions
Min
ERROR AMPLIFIER
Input Bias Current
−25
VSP Input Voltage Range
−0.3
VSN Input Voltage Range
−0.3
gm 1.3
Output Offset
−15
Open Loop Gain
ZL = (1 nF +1 kW) || 10 pF
−
Source Current
Sink Current
−3dB Bandwidth
DVIN = −200 mV
DVIN = 200 mV
ZL = (1 nF +1 kW) || 10 pF
−
−
−
CURRENT SENSE AMPLIFIER
Input Bias Current
CSP = CSN = 1.2 V
−50
Common Mode Input Voltage Range CSP = CSN
0
Common Mode Rejection
CSP = CSN = 0.5 V to 1.2 V
60
Differential Mode Input Voltage
Range
CSN = 1.2 V
−100
Gain IOUT Output
Gain VSP and ILIM Outputs
−3dB Bandwidth
0 V ≤ CSP−CSN ≤ 0.1 V
0 V ≤ CSP−CSN ≤ 0.1 V
0.96
0.96
−
OVER-CURRENT PROTECTION
Output Offset Current
Maximum Output Current
Maximum Output Voltage
Activation Threshold Voltage
VILIM = 1.3 V
0 V ≤ VILIM ≤ 1.3 V
IILIM = 100 mA
−1.5
130
1.4
1.28
Activation Delay
−
IOUT
Output Offset Current
0 V ≤ VIOUT ≤ 2.0 V
−250
Typ
−
−
−
1.6
−
73
200
200
20
−
−
80
−
1
1
6
−
−
−
1.3
250
−
Max Unit
25 nA
3V
0.3 V
2.0 mS
15 mA
− dB
− mA
− mA
− MHz
50 nA
2.3 V
− dB
100 mV
1.04 mS
1.04 mS
− MHz
1.5 mA
− mA
−V
1.32 V
− ns
250 nA
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11
11 Page |
Páginas | Total 28 Páginas | |
PDF Descargar | [ Datasheet NCP81246.PDF ] |
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