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PDF LE24163LBXA Data sheet ( Hoja de datos )
| Número de pieza | LE24163LBXA | |
| Descripción | 16kb I2C CMOS Serial EEPROM | |
| Fabricantes | ON Semiconductor | |
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Ordering number : ENA2324
LE24163LBXA
CMOS LSI
16 kb I2C CMOS Serial
EEPROM
http://onsemi.com
Overview
The LE24163LBXA (hereinafter referred to as ‘this device’) is two-wire serial interface EEPROM (Electrically
Erasable and Programmable ROM). This device realizes high speed and a high level reliability by our company’s high
performance CMOS EEPROM technology. This device is compatible with I2C memory protocol, therefore it is best
suited for application that requires re-writable nonvolatile parameter memory.
Function
Capacity: 16k bits (2k x 8 bits)
Single supply voltage: 1.7V to 3.6V (Read)
Operating temperature: 40ºC to +85ºC
Interface: Two wire serial interface (I2C Bus*)
Operating clock frequency: 400kHz
Low Power consumption
: Standby: 2 µA (max.)
: Active (Read): 0.5 mA (max.)
Automatic page write mode: 16 Bytes
Read mode: Sequential Read and random read
Erase/Write cycles: 105 cycles (Page Write)
WLCSP5, 1.20x0.80
Data Retention: 20 years
Shipped Data Pattern: FFh
High reliability: Adopts proprietary symmetric memory array configuration (USP6947325)
Hardware write protect feature
Noise filters connected to SCL and SDA pins
Incorporates a feature to prohibit write operations under low voltage conditions.
Specifications
Absolute Maximum Ratings at Ta = 25C
Parameter
Supply voltage
Symbol
DC input voltage
Over-shoot voltage
Storage temperature
Tstg
Conditions
Ratings
0.5 to +4.6
0.5 to VCC+0.5
1.0 to VCC+1.0
65 to +150
Unit
V
V
V
C
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed,
damage may occur and reliability may be affected.
* This product is licensed from Silicon Storage Technology, Inc. (USA).
* I2C Bus is a trademark of Philips Corporation.
ORDERING INFORMATION
See detailed ordering and shipping information on page 15 of this data sheet.
Semiconductor Components Industries, LLC, 2014
April, 2014 Rev.1.10
40414HK 20140325-S00001 No.A2324-1/15
1 page  
Block Diagram
WP
SCL
SDA
LE24163LBXA
Write controller
High voltage generator
EEPROM Array
Y decoder & Sense AMP
Serial-Parallel converter
No.A2324-5/15
5 Page 
LE24163LBXA
7) EEPROM Read Operation
7)-1. Current Address Read
The device has an internal address counter. It maintains that last address during the last read or write
operation, with incremented by one. The current address read accesses the address kept by the internal
address counter. After receiving a start condition and the device address word with the 8th bit = 1 (Read),
the EEPROM outputs the 8-bit current address data from following acknowledgement 0. If the EEPROM
receives acknowledgement 1 and a following stop condition, the EEPROM stops the read operation and
is returned to a standby mode. In case the EEPROM has accessed the last address of the last page at
previous read operation, the current address will roll over and returns to zero address. In case EEPROM
has accessed tha last address of the last page at previous write operation, the current address roll over
within page addressing and returns to the first address in the same page.
The current address is valid while power is on. After power on, the current address will be reset (all 0).
Note: After the page write operation, the current address is the specified memory address in the last page
write, if the write data is more than 16-bytes.
SDA
Device Address
Data (n+1)
1
01
0
A
10
A9 A8 R
D7 D6 D5 D4 D3 D2 D1 D0
ACK
R/W
NO ACK
Access from master device
7)-2. Random Read
The random read requires a dummy write to set read address. The EEPROM receives a start condition
and the device address word with the 8th bit = 0 (write), the memory address. The EEPROM outputs
acknowledgement 0 after receiving memory address then enters a current address read with receiving a
start condition. The EEPROM outputs the read data of the address which was defined in the dummy write
operation. After receiving no acknowledgement and a following stop condition, the EEPROM stops the
random read operation and returns to a standby mode.
SDA
Device Address
Memory Address
Device Address
Data(n)
1
0
1
0
A
10
A9 A8
W
A7 A6 A5 A4 A3 A2 A1 A0
1
0
1
0
A
10
A9 A8
R
D7D6 ~ D1D0
ACK
R/W
ACK
ACK
R/W
Dummy Write
Current Read
NO ACK
Access from master device
No.A2324-11/15
11 Page | ||
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| PDF Descargar | [ Datasheet LE24163LBXA.PDF ] | |
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