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PDF NSL12TT1 Data sheet ( Hoja de datos )
| Número de pieza | NSL12TT1 | |
| Descripción | High Current Surface Mount PNP Silicon Transistor | |
| Fabricantes | ON Semiconductor | |
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NSL12TT1
High Current Surface
Mount PNP Silicon
Low VCE(sat) Transistor for
Battery Operated
Applications
MAXIMUM RATINGS (TA = 25°C)
Rating
Collector-Emitter Voltage
Collector-Base Voltage
Emitter-Base Voltage
Collector Current – Peak
Collector Current – Continuous
Electrostatic Discharge
Symbol
VCEO
VCBO
VEBO
IC
ESD
THERMAL CHARACTERISTICS
Characteristic
Symbol
Total Device Dissipation
TA = 25°C
Derate above 25°C
PD (Note 1)
Thermal Resistance,
Junction to Ambient
RθJA (Note 1)
Total Device Dissipation
TA = 25°C
Derate above 25°C
PD (Note 2)
Thermal Resistance,
Junction to Ambient
RθJA (Note 2)
Thermal Resistance,
Junction to Lead #3
RθJL
Junction and Storage
Temperature Range
TJ, Tstg
1. FR–4 @ Minimum Pad
2. FR–4 @ 1.0 X 1.0 inch Pad
Max Unit
–12 Vdc
–20 Vdc
–4.0 Vdc
–1.0 Adc
–0.5
HBM Class 3B
MM Class C
Max Unit
210 mW
1.7 mW/°C
595 °C/W
365 mW
2.9 mW/°C
340 °C/W
205 °C/W
–55 to
+150
°C
http://onsemi.com
12 VOLTS
1.0 AMPS
PNP TRANSISTOR
COLLECTOR
3
1
BASE
2
EMITTER
3
2
1
CASE 463
SOT–416/SC–75
STYLE 1
DEVICE MARKING
L2
L2 = Specific Device Code
ORDERING INFORMATION
Device
Package
Shipping
NSL12TT1
SOT–416 3000/Tape & Reel
© Semiconductor Components Industries, LLC, 2002
February, 2002 – Rev. 2
1
Publication Order Number:
NSL12TT1/D
1 page  
NSL12TT1
INFORMATION FOR USING THE SOT–416 SURFACE MOUNT PACKAGE
MINIMUM RECOMMENDED FOOTPRINT FOR SURFACE MOUNTED APPLICATIONS
Surface mount board layout is a critical portion of the total
interface between the board and the package. With the
design. The footprint for the semiconductor packages must
correct pad geometry, the packages will self align when
be the correct size to insure proper solder connection
subjected to a solder reflow process.
TYPICAL
SOLDERING PATTERN
Unit: mm
0.5
ÉÉÉÉÉÉÉÉÉ
min.
(3x)
ÉÉÉÉÉÉÉÉÉ
ÉÉÉÉÉÉÉÉÉ
1.4
SOT–416/SC–90 POWER DISSIPATION
The power dissipation of the SOT–416/SC–90 is a func-
tion of the pad size. This can vary from the minimum pad
size for soldering to the pad size given for maximum power
dissipation. Power dissipation for a surface mount device
is determined by TJ(max), the maximum rated junction tem-
perature of the die, RθJA, the thermal resistance from the
device junction to ambient; and the operating temperature,
TA. Using the values provided on the data sheet, PD can be
calculated as follows.
PD =
TJ(max) – TA
RθJA
The values for the equation are found in the maximum
ratings table on the data sheet. Substituting these values into
the equation for an ambient temperature TA of 25°C, one
can calculate the power dissipation of the device which in
this case is 125 milliwatts.
PD =
150°C – 25°C
833°C/W
= 150 milliwatts
The 833°C/W assumes the use of the recommended foot-
print on a glass epoxy printed circuit board to achieve a
power dissipation of 150 milliwatts. Another alternative
would be to use a ceramic substrate or an aluminum core
board such as Thermal Clad™. Using a board material such
as Thermal Clad, a higher power dissipation can be
achieved using the same footprint.
SOLDERING PRECAUTIONS
The melting temperature of solder is higher than the rated
temperature of the device. When the entire device is heated
to a high temperature, failure to complete soldering within
a short time could result in device failure. Therefore, the
following items should always be observed in order to
minimize the thermal stress to which the devices are
subjected.
• Always preheat the device.
• The delta temperature between the preheat and
soldering should be 100°C or less.*
• When preheating and soldering, the temperature of the
leads and the case must not exceed the maximum
temperature ratings as shown on the data sheet. When
using infrared heating with the reflow soldering
method, the difference should be a maximum of 10°C.
• The soldering temperature and time should not exceed
260°C for more than 10 seconds.
• When shifting from preheating to soldering, the
maximum temperature gradient should be 5°C or less.
• After soldering has been completed, the device should
be allowed to cool naturally for at least three minutes.
Gradual cooling should be used as the use of forced
cooling will increase the temperature gradient and
result in latent failure due to mechanical stress.
• Mechanical stress or shock should not be applied dur-
ing cooling
* Soldering a device without preheating can cause exces-
sive thermal shock and stress which can result in damage
to the device.
http://onsemi.com
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