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PDF NCP1339 Data sheet ( Hoja de datos )
| Número de pieza | NCP1339 | |
| Descripción | QuasiResonant Controller featuring Valley Lock-Out and Power Saving Mode | |
| Fabricantes | ON Semiconductor | |
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NCP1339
High-Voltage, Quasi-
Resonant Controller
featuring Valley Lock-Out
and Power Saving Mode
The NCP1339 is a highly integrated quasi−resonant flyback
controller capable of controlling rugged and high−performance
off−line power supplies as required by adapter applications. With an
integrated active X−cap discharge feature and power savings mode,
the NCP1339 can enable no−load power consumption below 10 mW
for 45 W notebook adapters.
The quasi−resonant current−mode flyback stage features a
proprietary valley−lockout circuitry, ensuring stable valley switching.
This system works down to the 6th valley and toggles to a frequency
foldback mode to eliminate switching losses. When the loop tends to
force below 25−kHz frequencies, the NCP1339 skips cycles to contain
the power delivery.
To help build rugged converters, the controller features several key
protective features: an internal brown−out, a non−dissipative Over
Power Protection for a constant maximum output current regardless of
the input voltage, a latched over−voltage protection through a
dedicated pin.
Features
• High−voltage Current Source for Lossless Start−up Sequence
• X2 Capacitors Discharge Capability
• Power Savings Mode (PSM) for Extremely Low No−Load Power:
• Wide VCC Range from 10 V to 28 V
• Latching−off 28−V VCC Over−Voltage Protection
• Abnormal Overcurrent Fault Protection for Winding Short Circuit or
Inductor Saturation Detection
• Integrated High−Voltage Startup Circuit with Brown−Out Detection
• Fault Input for Severe Fault Conditions, NTC Compatible for OTP
• Circuit Latching Off In Severe Fault Detection (OVP or OTP)
• Internal Temperature Shutdown
• Valley Switching Operation with Valley−Lockout for Noise−Free
Operation
• Frequency Fold−back for Highest Performance in Standby Mode
• 25−kHz Clamp and Skip Mode
• Timer−Based Overload Protection (Latched or Auto−Recovery
Options)
• Adjustable Overpower Protection
• 4−ms Soft−Start Timer
• ZCD Blanking Time to Ignore Leakage Ringing at Turn−Off:
3 ms for C, D and E versions and 0.7 ms for F, G or H versions
• These Devices are Pb−Free and are RoHS Compliant
This document contains information on some products that are still under development.
ON Semiconductor reserves the right to change or discontinue these products without
notice.
www.onsemi.com
14
1
SOIC−14 NB
(LESS PIN 13)
D SUFFIX
CASE 751AN
MARKING DIAGRAM
14
NCP1339xG
AWLYWW
1
NCP1339 = Specific Device Code
x = C, D, E, F, G or H
A = Assembly Location
WL = Wafer Lot
Y = Year
WW = Work Week
G = Pb−Free Package
PIN CONNECTIONS
X2
REM
OPP
ZCD
Fault
FB
CS
HV
NC
NC
VCC
DRV
GND
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 30 of this data sheet.
© Semiconductor Components Industries, LLC, 2015
August, 2015 − Rev. 3
1
Publication Order Number:
NCP1339/D
1 page  
NCP1339
MAXIMUM RATINGS
Rating
Symbol
Value
Unit
High Voltage Startup Circuit Input Voltage
High Voltage Startup Circuit Input Current
Supply Input Voltage
Supply Input Current
Supply Input Voltage Slew Rate
Fault Input Voltage
Fault Input Current
REM and X2 Input Voltage
REM and X2 Input Current
Zero Current Detection and OPP Input Voltage
Zero Current Detection and OPP Input Current
Current Sense Input Voltage
Current Sense Input Current
Feedback Input Voltage
Feedback Input Current
Driver Maximum Voltage (Note 1)
Driver Maximum Current
Operating Junction Temperature
Maxim Junction Temperature
Storage Temperature Range
Thermal Resistance, Junction to Ambient 2 Oz Cu Printed Circuit Copper Clad
With a 100 mm2 copper heat spreader area
VHV
IHV
VCC(MAX)
ICC(MAX)
dVCC/dt
Vi1
Ii1
Vi2
Ii2
VZCD
IZCD
VCS
ICS
VFB
IFB
VDRV
IDRV(SRC)
IDRV(SNK)
TJ
TJ(MAX)
TSTG
RθJA
−0.3 to 500
20
−0.3 to 30
30
1
−0.3 to (VCC + 1)
10
−0.3 to 10
10
−0.3 to (VCC + 1)
−2/+5
−0.3 to 5
10
−0.3 to 9
10
−0.3 to VDRV(high)
500
800
−40 to 125
150
–60 to 150
132
V
mA
V
mA
V/ms
V
mA
V
mA
V
mA
V
mA
V
mA
V
mA
°C
°C
°C
°C/W
ESD Capability (All pins except HV) (Note 4)
Human Body Model per JEDEC Standard JESD22−A114F.
Machine Model per JEDEC Standard JESD22−A115C.
Charge Device Model per JEDEC Standard JESD22−C101E.
2000
200
500
V
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
1. Maximum driver voltage is limited by the driver clamp voltage, VDRV(high), when VCC exceeds the driver clamp voltage. Otherwise, the
maximum driver voltage is VCC.
2. This device contains Latch−Up protection and exceeds ± 100 mA per JEDEC Standard JESD78.
3. Low Conductivity Board. As mounted on 80 x 100 x 1.5 mm FR4 substrate with a single layer of 50 mm2 of 2 oz copper trances and heat
spreading area. As specified for a JEDEC51−1 conductivity test PCB. Test conditions were under natural convection of zero air flow.
4. Pin 14 is rated up to 1 kV.
www.onsemi.com
5
5 Page 
NCP1339
TYPICAL CHARACTERISTICS
2.0
1.9
1.8
1.7
1.6
1.5
1.4
1.3
1.2
1.1
1.0
−40 −20 0 20 40 60 80 100
TEMPERATURE (°C)
Figure 15. V_REM_on vs. Junction
Temperature
120
130
125
120
115
110
105
100
−40 −20 0 20 40 60 80 100
TEMPERATURE (°C)
Figure 17. REM_timer vs. Junction
Temperature
120
96
95
94
93
92
91
90
−40 −20 0 20 40 60 80 100 120
TEMPERATURE (°C)
Figure 19. VBO(stop) vs. Junction Temperature
8.5
8.4
8.3
8.2
8.1
8.0
7.9
7.8
7.7
7.6
7.5
−40 −20 0 20 40 60 80 100
TEMPERATURE (°C)
Figure 16. V_REM_off vs. Junction
Temperature
120
109
107
105
103
101
99
97
95
−40 −20 0 20 40 60 80 100 120
TEMPERATURE (°C)
Figure 18. VBO(start) vs. Junction Temperature
83
78
73
68
63
58
53
−40 −20 0 20 40 60 80 100 120
TEMPERATURE (°C)
Figure 20. tBO(stop) vs. Junction Temperature
www.onsemi.com
11
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet NCP1339.PDF ] | |
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