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ON Semiconductor - ESD Protection

Numéro de référence NIS1161
Description ESD Protection
Fabricant ON Semiconductor 
Logo ON Semiconductor 





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NIS1161 fiche technique
NIV1161, NIS1161
ESD Protection with
Automotive Short-to-
Battery Blocking
Low Capacitance ESD Protection with
short−to−battery blocking for Automotive
High Speed Data Lines
The NIS/NIV1161 is designed to protect high speed data lines from
ESD as well as short to vehicle battery situations. The ultra−low
capacitance and low ESD clamping voltage make this device an ideal
solution for protecting voltage sensitive high speed data lines while
the low RDS(on) FET limits distortion on the signal lines. The
flow−through style package allows for easy PCB layout and matched
trace lengths necessary to maintain consistent impedance between
high speed differential lines such as USB and LVDS protocols.
Features
Low Capacitance (0.65 pF Typical, I/O to GND)
Diode Capacitance Matching Between I/O’s: 1% Typical
Optimized Layout for Excellent High Speed Signal Integrity
Protection for the Following IEC Standards:
IEC 61000−4−2 (Level 4)
Low ESD Clamping Voltage
NIV Prefix for Automotive and Other Applications Requiring
Unique Site and Control Change Requirements; AEC−Q101
Qualified and PPAP Capable
This is a Pb−Free Device
Typical Applications
Automotive High Speed Signal Pairs
USB2.0/3.0
LVDS
HDMI
APIX2
ABSOLUTE MAXIMUM RATINGS (TJ = 25°C unless otherwise noted)
Rating
Symbol
Value
Unit
Operating Junction Temperature Range TJ(max) −55 to +150
°C
Storage Temperature Range
TSTG −55 to +150
°C
Drain−to−Source Voltage
VDSS
30
V
Gate−to−Source Voltage
VGS ±10
V
Lead Temperature Soldering
TSLD 260 °C
IEC 61000−4−2 Contact (ESD)
IEC 61000−4−2 Air (ESD)
ESD ±8 kV
ESD ±15 kV
Stresses exceeding those listed in the Maximum Ratings table may damage the
device. If any of these limits are exceeded, device functionality should not be
assumed, damage may occur and reliability may be affected.
www.onsemi.com
MARKING
DIAGRAM
WDFN6
CASE 511CB
V6 M
1
V6 = Specific Device Code
M = Date Code
PIN CONFIGURATION
AND SCHEMATICS
16
6
25
34
4
(Top View)
Pin 2 − 5 V
Pin 1
D+ HOST
Pin 3
D− HOST
Pin 2 − 5 V
Pin 6
D+
Pin 4
D−
Pin 5 − GND
ORDERING INFORMATION
Device
Package
Shipping
NIV1161MTTAG
NIS1161MTTAG
WDFN−6
(Pb−Free)
WDFN−6
(Pb−Free)
3000 / Tape & Reel
3000 / Tape & Reel
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specification
Brochure, BRD8011/D.
© Semiconductor Components Industries, LLC, 2015
July, 2015 − Rev. 0
1
Publication Order Number:
NIV1161/D

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