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PDF NCP51145 Data sheet ( Hoja de datos )
| Número de pieza | NCP51145 | |
| Descripción | Termination Regulator | |
| Fabricantes | ON Semiconductor | |
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NCP51145
DDR 1.8 Amp Source / Sink
VTT Termination Regulator
The NCP51145 is a linear regulator designed to supply a regulated
VTT termination voltage for DDR−II, DDR−III, LPDDR−III and
DDR−IV memory applications. The regulator is capable of actively
sourcing and sinking ±1.8 A peak currents while regulating an output
voltage to within ±20 mV. The output termination voltage is regulated
to track VDDQ / 2 by two external voltage divider resistors connected
to the PVCC, GND, and VREF pins.
The NCP51145 incorporates a high−speed differential amplifier to
provide ultra−fast response to line and load transients. Other features
include source/sink current limiting, soft−start and on−chip thermal
shutdown protection.
Features
• For DDR VTT Applications, Source/Sink Currents:
• Supports DDR−II to ±1.8 A, DDR−III to ±1.5 A
• Supports LPDDR−III and DDR−IV to ±1.2 A
• Stable Using Ceramic−Only (Very Low ESR) Capacitors
• Integrated Power MOSFETs
• High Accuracy VTT Output at Full−Load
• Fast Transient Response
• Built−in Soft−Start
• Shutdown for Standby or Suspend Mode
• Integrated Thermal and Current−Limit Protection
• VTT Remote Sense Available in the DFN8 2x2mm Package
• These Devices are Pb−Free and are RoHS Compliant
Typical Applications
• DDR−II / DR−III / DDR−IV SDRAM Termination Voltage
• Motherboard, Notebook, and VGA Card Memory Termination
• Set Top Box, Digital TV, Printers
• Low Power DDR−3LP
www.onsemi.com
MARKING
DIAGRAMS
8
8
1
SOIC−8 EP
D SUFFIX
CASE 751BU
51145
AYWWG
G
1
DFN8
MN SUFFIX
CASE 506AA
1
XXMG
G
1
51145
XX
M
A
Y
WW
G
= Specific Device Code
= Specific Device Code
= Date Code
= Assembly Location
= Year
= Work Week
= Pb−Free Package
(Note: Microdot may be in either location)
PIN CONNECTIONS
1 81
8
PVCC
NC PVCC
VCC
GND
NC
VREF
VCC
VTT SOIC−8 EP NC
VTT
NC
GND
NC
VTTS
VREF
DFN8 2x2, 0.5P
(Top Views)
ORDERING INFORMATION
Device
Package
Shipping†
NCP51145PDR2G SOIC−8 2500 / Tape &
(Pb−Free)
Reel
NCP51145MNTAG DFN−8 3000 / Tape &
(Pb−Free)
Reel
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.
© Semiconductor Components Industries, LLC, 2015
June, 2015 − Rev. 2
1
Publication Order Number:
NCP51145/D
1 page  
NCP51145
PACKAGE DIMENSIONS
D
8
A NOTE 5
2X
5 0.10 C D
SOIC8−NB EP
CASE 751BU
ISSUE B
F
NOTE 6
A1
E
2X 4 TIPS
0.20 C
1
NOTE 5 B
TOP VIEW
0.10 C
NOTE 4
D
E1
NOTE 4
L2
4
8X b
0.25 M C A-B D
L
DETAIL A
C
SEATING
PLANE
2X
0.10 C A-B
8X
0.10 C
DETAIL A
B
h
Ae
SIDE VIEW
C
SEATING
PLANE
NOTE 7
F
G
B
END VIEW
c c1 ÇÇÇÉÉÇÇÇÉÉbb1 ÇÇÇÉÉ
SECTION B−B
BOTTOM VIEW
RECOMMENDED
SOLDERING FOOTPRINT
3.30
NOTES:
1. DIMENSIONING AND TOLERANCING PER ASME
Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. DIMENSION b DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE PROTRUSION SHALL
BE 0.10mm IN EXCESS OF MAXIMUM MATERIAL
CONDITION.
4. DIMENSION D DOES NOT INCLUDE MOLD FLASH,
PROTRUSIONS, OR GATE BURRS. MOLD FLASH,
PROTRUSIONS, OR GATE BURRS SHALL NOT
EXCEED 0.15mm PER SIDE. DIMENSION E DOES
NOT INCLUDE INTERLEAD FLASH OR
PROTRUSION. INTERLEAD FLASH OR
PROTRUSION SHALL NOT EXCEED 0.25mm PER
SIDE. DIMENSIONS D AND E ARE DETERMINED AT
DATUM F.
5. DIMENSIONS A AND B ARE TO BE DETERMINED
AT DATUM F.
6. A1 IS DEFINED AS THE VERTICAL DISTANCE
FROM THE SEATING PLANE TO THE LOWEST
POINT ON THE PACKAGE BODY.
7. TAB CONTOUR MAY VARY MINIMALLY TO INCLUDE
TOOLING FEATURES.
MILLIMETERS
DIM MIN MAX
A 1.35 1.75
A1 −−− 0.10
b 0.31 0.51
b1 0.28 0.48
c 0.17 0.25
c1 0.17 0.23
D 4.90 BSC
E 6.00 BSC
E1 3.90 BSC
e 1.27 BSC
F 1.55 3.07
G 1.55 3.07
h 0.25 0.50
L 0.40 1.27
L2 0.25 BSC
8X 1.52
3.10
7.00
1
1.27
PITCH
8X
0.60
DIMENSION: MILLIMETERS
www.onsemi.com
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| PDF Descargar | [ Datasheet NCP51145.PDF ] | |
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