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PDF LC87F5LP6A Data sheet ( Hoja de datos )
| Número de pieza | LC87F5LP6A | |
| Descripción | 8-bit 1-chip Microcontroller | |
| Fabricantes | ON Semiconductor | |
| Logotipo |  |
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Ordering number : ENA0664
LC87F5LP6A
CMOS IC
FROM 256K byte, RAM 8192 byte on-chip
8-bit 1-chip Microcontroller
http://onsemi.com
Overview
The LC87F5LP6A is an 8-bit microcomputer that, centered around a CPU running at a minimum bus cycle
time of 83.3ns, integrate on a single chip a number of hardware features such as 256K-byte flash ROM (onboard
rewritable), 8K-byte RAM, Onchip debugging function, two sophisticated 16-bit timers/counters (may be divided
into
8-bit timers), four 8-bit timers with a prescaler, a base timer serving as a time-of-day clock, two synchronous SIO
ports
(with automatic block transmission/reception capabilities), an asynchronous/synchronous SIO port, two UART ports
(full duplex), four 12-bit PWM channels, an 8-bit 15-channel AD converter, a high-speed clock counter, a system
clock
frequency divider, and a 29-source 10-vector interrupt feature.
Features
Flash ROM
• Single 5V power supply, on-board writeable
• Block erase in 128 byte units
• 262144 × 8 bits (LC87F5LP6A)
RAM
• 8192 × 9 bits (LC87F5LP6A)
Minimum Bus Cycle Time
• 83.3ns (12MHz)
Note: Bus cycle time indicates the speed to read ROM.
Minimum Instruction Cycle Time (tCYC)
• 250ns (12MHz)
* This product is licensed from Silicon Storage Technology, Inc. (USA).
Semiconductor Components Industries, LLC, 2013
May, 2013
Ver.1.01
31407HKIM 20061227-S00001 No. A0664-1/28
1 page  
Package Dimensions
unit : mm (typ)
3151A
80
81
23.2
20.0
51
50
LC87F5LP6A
100
1
(0.58)
0.65
31
30
0.3
0.15
SANYO : QIP100E(14X20)
Package Dimensions
unit : mm (typ)
3274
16.0
14.0
75 51
76 50
100
1
0.5
(1.0)
26
25
0.2
0.125
SANYO : TQFP100(14X14)
No.A0664-5/28
5 Page 
LC87F5LP6A
Continued from preceding page.
Pin Name
I/O
Description
Port 7
P70 to P73
I/O • 4-bit I/O port
• I/O specifiable in 1-bit units
• Pull-up resistor can be turned on and off in 1-bit units
• Other functions
P70: INT0 input/HOLD release input/Timer 0L capture input/Output for watchdog timer
P71: INT1 input/HOLD release input/Timer 0H capture input
P72: INT2 input/HOLD release input/Timer 0 event input/Timer 0L capture input
P73: INT3 input with noise filter/Timer 0 event input/Timer 0H capture input
• Interrupt acknowledge type
Rising
Falling
Rising/
Falling
H level
L level
INT0
enable
enable
disable
enable
enable
INT1
enable
enable
disable
enable
enable
INT2
enable
enable
enable
disable
disable
INT3
enable
enable
enable
disable
disable
• AD converter input port: AN8 (P70), AN9 (P71)
Port 8
P80 to P87
Port A
PA0 to PA5
Port B
PB0 to PB7
Port C
PC0 to PC7
Port E
PE0 - PE7
Port F
PF0 to PF7
SIO2 Port
SI2P0 to SI2P3
PWM0
PWM1
RES
I/O • 8-bit I/O port
• I/O specifiable in 1-bit units
• Other functions
P80 to P87: AD converter input port
I/O • 6-bit I/O port
• I/O specifiable in 1-bit units
• Pull-up resistor can be turned on and off in 1-bit units
I/O • 8-bit I/O port
• I/O specifiable in 1-bit units
• Pull-up resistor can be turned on and off in 1-bit units
I/O • 8-bit I/O port
• I/O specifiable in 1-bit units
• Pull-up resistor can be turned on and off in 1-bit units
• Pin functions
PC5 to PC7: On-chip Debugger
I/O • 8-bit I/O port
• I/O specifiable in 2-bit units
• Pull-up resistor can be turned on and off in 1-bit units
I/O • 8-bit I/O port
• I/O specifiable in 2-bit units
• Pull-up resistor can be turned on and off in 1-bit units
I/O • 4-bit I/O port
• I/O specifiable in 1-bit units
• Shared functions:
SI2P0: SIO2 data output
SI2P1: SIO2 data input, bus input/output
SI2P2: SIO2 clock input/output
SI2P3: SIO2 clock output
O • PWM0 output port
• General-purpose I/O available
O • PWM1 output port
• General-purpose I/O available
I Reset pin
XT1 I • Input terminal for 32.768kHz X'tal oscillation
• Shared functions:
AN10: AD converter input port
General-purpose input port
Must be connected to VDD1 if not to be used.
XT2 I/O • Output terminal for 32.768kHz X'tal oscillation
• Shared functions:
AN11: AD converter input port
General-purpose I/O port
Must be set for oscillation and kept open if not to be used.
CF1 I Ceramic resonator input pin
CF2 O Ceramic resonator output pin
Option
No
No
Yes
Yes
Yes
No
No
No
No
No
No
No
No
No
No
No.A0664-11/28
11 Page | ||
| Páginas | Total 28 Páginas | |
| PDF Descargar | [ Datasheet LC87F5LP6A.PDF ] | |
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