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PDF NCL30085 Data sheet ( Hoja de datos )

Número de pieza NCL30085
Descripción Power Factor Corrected Quasi-Resonant Primary Side Current-Mode Controller
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NCL30085
Power Factor Corrected
Quasi-Resonant Primary
Side Current-Mode
Controller for LED Lighting
with Line Step Dimming and
www.onsemi.com
Thermal Foldback
8
The NCL30085 is a power factor corrected flyback controller
1
targeting isolated and non−isolated constant current LED drivers. The
controller operates in a quasi−resonant mode to provide optimal
SOIC−8 NB
CASE 751
efficiency. Thanks to a novel control method, the device is able to
tightly regulate a constant LED current from the primary side. This
MARKING DIAGRAM
removes the need for secondary side feedback circuitry, biasing and an
8
optocoupler.
The device is highly integrated with a minimum number of external
components. A robust suite of safety protection is built in to simplify
L30085x
ALYW
G
the design. This device is specifically intended for very compact,
1
space efficient designs and supports 3 levels of log step dimming
L30085x = Specific Device Code
which allows light output reduction by toggling the main AC switch
on and off to signal the controller to reduce the LED current point
down to 5% of full load.
x = A, B
A = Assembly Location
L = Wafer Lot
Y = Year
Features
Quasi−resonant Peak Current−mode Control Operation
W = Work Week
G = Pb-Free Package
Constant Current Control with Primary Side Feedback
Tight LED Constant Current Regulation of ±2% Typical
Power Factor Correction
PIN CONNECTIONS
1
ZCD
VCC
3 Step Dimming (70/25/5%)
VS DRV
Line Feedforward for Enhanced Regulation Accuracy
COMP
GND
Low Start−up Current (10 mA typ.)
Wide Vcc Range
300 mA / 500 mA Totem Pole Driver with 12 V Gate Clamp
SD CS
(Top View)
Robust Protection Features
OVP on VCC
Programmable Over Voltage / LED Open Circuit Protection
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 26 of this data sheet.
Cycle−by−cycle Peak Current Limit
Winding Short Circuit Protection
Secondary Diode Short Protection
Pb−Free, Halide−Free MSL1 Product
Output Short Circuit Protection
Current Sense Short Protection
User Programmable NTC Based Thermal Foldback
Typical Applications
Integral LED Bulbs and Tubes
Thermal Shutdown
LED Light Engines
Vcc Undervoltage Lockout
Brown−out Protection
LED Drivers/Power Supplies
© Semiconductor Components Industries, LLC, 2015
April, 2015 − Rev. 3
1
Publication Order Number:
NCL30085/D

1 page




NCL30085 pdf
NCL30085
Table 3. ELECTRICAL CHARACTERISTICS (Unless otherwise noted: For typical values TJ = 25°C, VCC = 12 V, VZCD = 0 V,
VCS = 0 V, VSD = 1.5 V) For min/max values TJ = −40°C to +125°C, VCC = 12 V)
Description
Test Condition
Symbol
Min Typ Max Unit
CURRENT SENSE
Propagation delay from current detection to gate
off−state
tILIM
− 100 150 ns
Maximum on−time
Threshold for immediate fault protection activation
Leading Edge Blanking Duration for VCS(stop)
Current source for CS to GND short detection
Current sense threshold for CS to GND short de-
tection
VCS rising
ton(MAX)
VCS(stop)
tBCS
ICS(short)
VCS(low)
26 36 46
1.35 1.50 1.65
− 150 −
400 500 600
30 65 100
ms
V
ns
mA
mV
GATE DRIVE
Drive Resistance
DRV Sink
DRV Source
Drive current capability
DRV Sink (Note 6)
DRV Source (Note 6)
Rise Time (10% to 90%)
Fall Time (90% to 10%)
DRV Low Voltage
DRV High Voltage
ZERO VOLTAGE DETECTION CIRCUIT
RSNK
RSRC
− 13 −
− 30 −
ISNK
ISRC
− 500 −
− 300 −
CDRV = 470 pF
tr – 40 −
CDRV = 470 pF
tf – 30 −
VCC = VCC(off)+0.2 V
VDRV(low)
8
CDRV = 470 pF, RDRV=33 kW
VCC = VCC(MAX)
VDRV(high)
10
12
14
CDRV = 470 pF, RDRV=33 kW
W
mA
ns
ns
V
V
Upper ZCD threshold voltage
Lower ZCD threshold voltage
ZCD hysteresis
VZCD rising
VZCD falling
Propagation Delay from valley detection to DRV high
Blanking delay after on−time
Blanking Delay at light load
Timeout after last DEMAG transition
VZCD falling
VREFX > 30% VREF
VREFX < 25% VREF
Pulling−down resistor
VZCD = VZCD(falling)
CONSTANT CURRENT AND POWER FACTOR CONTROL
VZCD(rising)
VZCD(falling)
VZCD(HYS)
TDEM
TZCD(blank1)
TZCD(blank2)
TTIMO
RZCD(PD)
35
15
1.12
0.56
5.0
90
55
100
1.50
0.75
6.5
200
150
300
1.88
0.94
8.0
mV
mV
mV
ns
ms
ms
ms
kW
Reference Voltage at TJ = 25°C
VREF
245 250 255
mV
Reference Voltage TJ = 25°C to 100°C
VREF
242.5 250.0 257.5 mV
Reference Voltage TJ = −40°C to 125°C
VREF
240 250 260
mV
Current sense lower threshold
VCS falling
VCS(low) 20 50 100 mV
Vcontrol to current setpoint division ratio
Vratio
−4−
Error amplifier gain
VREFX=VREF (no dimming)
VREFX=25%* VREF
GEA
40 50 60
200
mS
6. Guaranteed by Design
7. A NTC is generally placed between the SD and GND pins. Parameters RTF(start), RTF(stop), ROTP(off) and ROTP(on) give the resistance the
NTC must exhibit to respectively, enter thermal foldback, stop thermal foldback, trigger the OTP limit and allow the circuit recovery after
an OTP situation.
8. At startup, when VCC reaches VCC(on), the controller blanks OTP for more than 250 ms to avoid detecting an OTP fault by allowing the
SD pin voltage to reach its nominal value if a filtering capacitor is connected to the SD pin.
www.onsemi.com
5

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NCL30085 arduino
NCL30085
TYPICAL CHARACTERISTICS
600
580
560
540
520
500
480
460
440
420
400
−50 −25 0 25 50 75 100 125
TJ, JUNCTION TEMPERATURE (°C)
Figure 19. ICS(short) vs. Temperature
150
20
18
16
14
12
10
8
6
4
2
0
−50 −25 0 25 50 75 100 125 150
TJ, JUNCTION TEMPERATURE (°C)
Figure 21. Sink Gate Drive Resistance vs.
Temperature
100
90
80
70
60
50
40
30
20
−50 −25 0 25 50 75 100 125 150
TJ, JUNCTION TEMPERATURE (°C)
Figure 20. VCS(low), VCS Rising vs.
Temperature
40
38
36
34
32
30
28
26
24
22
20
18
16
14
12
10
−50 −25 0 25 50 75 100 125 150
TJ, JUNCTION TEMPERATURE (°C)
Figure 22. Source Gate Drive Resistance vs.
Temperature
50
45
40
35
30
25
20
15
10
5
0
−50 −25 0 25 50 75 100 125
TJ, JUNCTION TEMPERATURE (°C)
Figure 23. Gate Drive Rise Time vs.
Temperature
150
50
45
40
35
30
25
20
15
10
5
0
−50 −25 0 25 50 75 100 125 150
TJ, JUNCTION TEMPERATURE (°C)
Figure 24. Gate Drive Fall Time
(CDRV = 470 pF) vs. Temperature
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