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NVMD6P02 fiches techniques PDF

ON Semiconductor - Power MOSFET ( Transistor )

Numéro de référence NVMD6P02
Description Power MOSFET ( Transistor )
Fabricant ON Semiconductor 
Logo ON Semiconductor 





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NVMD6P02 fiche technique
NTMD6P02, NVMD6P02
Power MOSFET
6 A, 20 V, P−Channel SOIC−8, Dual
Features
Ultra Low RDS(on)
Higher Efficiency Extending Battery Life
Logic Level Gate Drive
Miniature Dual SOIC−8 Surface Mount Package
Diode Exhibits High Speed, Soft Recovery
Avalanche Energy Specified
These Devices are Pb−Free and are RoHS Compliant
NVMD Prefix for Automotive and Other Applications Requiring
Unique Site and Control Change Requirements; AEC−Q101
Qualified and PPAP Capable
www.onsemi.com
6 AMPERES, 20 VOLTS
P−Channel
D
Applications
Power Management in Portable and Battery−Powered Products,
i.e.: Cellular and Cordless Telephones, and PCMCIA Cards
G
MAXIMUM RATINGS
Rating
Symbol Value Unit
S
Drain−to−Source Voltage
Gate−to−Source Voltage − Continuous
Thermal Resistance −
Junction−to−Ambient (Note 1)
Total Power Dissipation @ TA = 25°C
Continuous Drain Current @ TA = 25°C
Continuous Drain Current @ TA = 70°C
Maximum Operating Power Dissipation
Maximum Operating Drain Current
Pulsed Drain Current (Note 4)
Thermal Resistance −
Junction−to−Ambient (Note 2)
Total Power Dissipation @ TA = 25°C
Continuous Drain Current @ TA = 25°C
Continuous Drain Current @ TA = 70°C
Maximum Operating Power Dissipation
Maximum Operating Drain Current
Pulsed Drain Current (Note 4)
Thermal Resistance −
Junction−to−Ambient (Note 3)
Total Power Dissipation @ TA = 25°C
Continuous Drain Current @ TA = 25°C
Continuous Drain Current @ TA = 70°C
Maximum Operating Power Dissipation
Maximum Operating Drain Current
Pulsed Drain Current (Note 4)
Operating and Storage Temperature Range
Single Pulse Drain−to−Source Avalanche
Energy − Starting TJ = 25°C (VDD = −20 Vdc,
VGS = −5.0 Vdc, Peak IL = −5.0 Apk,
L = 40 mH, RG = 25 W)
Maximum Lead Temperature for Soldering
Purposes for 10 seconds
VDSS
VGS
−20
"12
V
V
RqJA
PD
ID
ID
PD
ID
IDM
62.5
2.0
−7.8
−5.7
0.5
−3.89
−40
°C/W
W
A
A
W
A
A
RqJA
PD
ID
ID
PD
ID
IDM
98
1.28
−6.2
−4.6
0.3
−3.01
−35
°C/W
W
A
A
W
A
A
RqJA
PD
ID
ID
PD
ID
IDM
TJ, Tstg
EAS
166
0.75
−4.8
−3.5
0.2
−2.48
−30
−55 to
+150
500
°C/W
W
A
A
W
A
A
°C
mJ
TL 260 °C
8
1
SOIC−8
CASE 751
STYLE 11
MARKING DIAGRAM &
PIN ASSIGNMENT
D1 D1 D2 D2
8
E6P02
AYWW G
G
1
S1 G1 S2 G2
E6P02 = Specific Device Code
A = Assembly Location
Y = Year
WW = Work Week
G = Pb−Free Package
(Note: Microdot may be in either location)
ORDERING INFORMATION
Device
Package
Shipping
NTMD6P02R2G SOIC−8 2500 / Tape & Reel
(Pb−Free)
NVMD6P02R2G SOIC−8 2500 / Tape & Reel
(Pb−Free)
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D
Stresses exceeding those listed in the Maximum Ratings table may damage the
device. If any of these limits are exceeded, device functionality should not be
assumed, damage may occur and reliability may be affected.
1. Mounted onto a 2square FR−4 Board (1 in sq, 2 oz. Cu 0.06thick single sided), t = 10 seconds.
2. Mounted onto a 2square FR−4 Board (1 in sq, 2 oz. Cu 0.06thick single sided), t = steady state.
3. Minimum FR−4 or G−10 PCB, t = steady state.
4. Pulse Test: Pulse Width = 300 ms, Duty Cycle = 2%.
© Semiconductor Components Industries, LLC, 2015
April, 2015 − Rev. 5
1
Publication Order Number:
NTMD6P02R2/D

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