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PDF EM5102AQP Data sheet ( Hoja de datos )

Número de pieza EM5102AQP
Descripción 2A Low Dropout LDO
Fabricantes CYStech Electronics 
Logotipo CYStech Electronics Logotipo



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CYStech Electronics Corp.
2A Low Dropout LDO
EM5102AQP
Spec. No. : C553QP
Issued Date : 2010.10.27
Revised Date :
Page No. : 1/12
General Description
EM5102A is a 2A low dropout linear regulator designed for low dropout and high current applications.
This device works with dual supplies, a control input for the control circuitry and a power input as low as
1.2V for providing current to output. It features 2A output current and ultra-low-drop output voltage as
well as full protection functions. VOUT can be as low as 0.8V.
.
Features
VIN Range 1.2V to 5.5V
VOUT is Adjustable (0.8V Min)
Excellent Line Regulation
Excellent Load Regulation
300mV @ 2A Dropout Voltage
OTP and OCP Functions
Very Low On-Resistance
Enable & Power good Signal
Applications
Notebook & Netbook
Graphic Cards & MB
Low Voltage Logic Supplies
Chipset Supplies
Server System
SMPS Post Regulators
Ordering Information
Part Number
EM5102AQP
Package
PSOP-8
(Pb-free lead plating package)
Pin Configuration
EM5102AQP
CYStek Product Specification

1 page




EM5102AQP pdf
Parameter
Thermal Protection
Thermal Shutdown
Temperature
Thermal Shutdown
Hysteresis
CYStech Electronics Corp.
Spec. No. : C553QP
Issued Date : 2010.10.27
Revised Date :
Page No. : 5/12
Symbol
Test Conditions
Min Typ Max Units
TSD
TSDHYS
VIN=VCNTL=VEN=5V, IOUT=0A,
VOUT=VREF
VIN=VCNTL=VEN=5V, IOUT=0A,
VOUT=VREF
- 170
- 30
- °C
- °C
Note 1. Stresses listed as the above “Absolute Maximum Ratings” may cause permanent damage to the device. These are for
stress ratings. Functional operation of the device at these or any other conditions beyond those indicated in the
operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended
periods may remain possibility to affect device reliability.
Note 2. θJA is measured in the natural convection at TA=25°C on a 4-layers high effective thermal conductivity test board with
minimum copper area of JEDEC 51-7 thermal measurement standard. The case point of θJC is on the expose pad for
PSOP-8 package.
Note 3. θJA is 52°C/W for PSOP-8 packages on JEDEC 51-7 (4 layers,2S2P) thermal test board with 50mm² copper area.
Note 4. Devices are ESD sensitive. Handling precaution is recommended.
Note 5. The device is not guaranteed to function outside its operating conditions.
Note 6. Load regulation is measured by a current pulse with 50Hz frequency and 10% duty cycle.
Note 7. The dropout voltage is defined as (VIN-VOUT), which is measured when VOUT equal to (VOUT,(NORMAL)-100mV).
EM5102AQP
CYStek Product Specification

5 Page





EM5102AQP arduino
CYStech Electronics Corp.
Spec. No. : C553QP
Issued Date : 2010.10.27
Revised Date :
Page No. : 11/12
Recommended wave soldering condition
Product
Peak Temperature
Pb-free devices
260 +0/-5 °C
Soldering Time
5 +1/-1 seconds
Recommended temperature profile for IR reflow
Profile feature
Sn-Pb eutectic Assembly
Pb-free Assembly
Average ramp-up rate
(Tsmax to Tp)
3°C/second max.
3°C/second max.
Preheat
Temperature Min(TS min)
Temperature Max(TS max)
Time(ts min to ts max)
100°C
150°C
60-120 seconds
150°C
200°C
60-180 seconds
Time maintained above:
Temperature (TL)
Time (tL)
183°C
60-150 seconds
217°C
60-150 seconds
Peak Temperature(TP)
240 +0/-5 °C
260 +0/-5 °C
Time within 5°C of actual peak
temperature(tp)
10-30 seconds
20-40 seconds
Ramp down rate
6°C/second max.
6°C/second max.
Time 25 °C to peak temperature
6 minutes max.
8 minutes max.
Note : All temperatures refer to topside of the package, measured on the package body surface.
EM5102AQP
CYStek Product Specification

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