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PDF FDA20N50_F109 Data sheet ( Hoja de datos )
| Número de pieza | FDA20N50_F109 | |
| Descripción | N-Channel UniFET MOSFET | |
| Fabricantes | Fairchild Semiconductor | |
| Logotipo |  |
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FDA20N50_F109
N-Channel UniFETTM MOSFET
500 V, 20 A, 230 mΩ
Features
• RDS(on) = 230 mΩ (Max.) @ VGS = 10 V, ID = 10 A
• Low Gate Charge (Typ. 45.6 nC)
• Low Crss (Typ. 27 pF)
• 100% Avalanche Tested
• Improved dv/dt Capability
Applications
• PDP TV
• Uninterruptible Power Supply
• AC-DC Power Supply
June 2014
Description
UniFETTM MOSFET is Fairchild Semiconductor’s high voltage
MOSFET family based on planar stripe and DMOS technology.
This MOSFET is tailored to reduce on-state resistance, and to
provide better switching performance and higher avalanche
energy strength. This device family is suitable for switching
power converter applications such as power factor correction
(PFC), flat panel display (FPD) TV power, ATX and electronic
lamp ballasts.
D
G
G
D
S
TO-3PN
Absolute Maximum Ratings TC = 25oC unless otherwise noted.
S
Symbol
Parameter
FDA20N50_F109
VDSS
ID
IDM
VGSS
EAS
IAR
EAR
dv/dt
PD
TJ, TSTG
TL
Drain-Source Voltage
Drain Current
Drain Current
- Continuous (TC = 25°C)
- Continuous (TC = 100°C)
- Pulsed
(Note 1)
Gate-Source voltage
Single Pulsed Avalanche Energy
(Note 2)
Avalanche Current
(Note 1)
Repetitive Avalanche Energy
(Note 1)
Peak Diode Recovery dv/dt
(Note 3)
Power Dissipation
(TC = 25°C)
- Derate above 25°C
Operating and Storage Temperature Range
Maximum Lead Temperature for Soldering Purpose,
1/8” from Case for 5 Seconds
500
22
13.2
88
± 30
1110
22
28.0
20
280
2.3
-55 to +150
300
Thermal Characteristics
Symbol
RθJC
RθJA
Parameter
Thermal Resistance, Junction-to-Case, Max.
Thermal Resistance, Junction-to-Ambient, Max.
©2007 Fairchild Semiconductor Corporation
FDA20N50_F109 Rev. C2
1
FDA20N50_F109
0.44
40
Unit
V
A
A
A
V
mJ
A
mJ
V/ns
W
W/°C
°C
°C
Unit
°C/W
°C/W
www.fairchildsemi.com
1 page  
Figure 12. Gate Charge Test Circuit & Waveform
IG = const.
V10GVS
Figure 13. Resistive Switching Test Circuit & Waveforms
VDS
VGS
RG
RL
VDD
DUT
VDS
90%
VGS 10%
td(on)
tr
t on
td(off)
tf
t off
Figure 14. Unclamped Inductive Switching Test Circuit & Waveforms
VGS
©2007 Fairchild Semiconductor Corporation
FDA20N50_F109 Rev. C2
5
www.fairchildsemi.com
5 Page | ||
| Páginas | Total 8 Páginas | |
| PDF Descargar | [ Datasheet FDA20N50_F109.PDF ] | |
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