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PDF HFBR-53D5 Data sheet ( Hoja de datos )
| Número de pieza | HFBR-53D5 | |
| Descripción | 1 x 9 Fiber Optic Transceivers | |
| Fabricantes | Avago | |
| Logotipo |  |
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HFBR-53D5 Family, 850 nm VCSEL
HFCT-53D5 Family, 1300 nm FP Laser
1 x 9 Fiber Optic Transceivers for Gigabit Ethernet
Data Sheet
Description
The HFBR/HFCT-53D5 transceiver from Avago
Technologies allows the system designer to implement
a range of solutions for multimode and single mode
Gigabit Ethernet applications.
The overall Avago Technologies transceiver product
consists of three sections: the transmitter and receiver
optical subassemblies, an electrical subassembly, and
the package housing which incorporates a duplex SC
connector receptacle.
Transmitter Section
The transmitter section of the HFBR-53D5 consists of
an 850 nm Vertical Cavity Surface Emitting Laser
(VCSEL) in an optical subassembly (OSA), which mates
to the fiber cable. The HFCT-53D5 incorporates a 1300
nm Fabry-Perot (FP) Laser designed to meet the Gigabit
Ethernet LX specification. The OSA is driven by a
custom, silicon bipolar IC which converts differential
PECL logic signals (ECL referenced to a +5 Volt supply)
into an analog laser diode drive current.
Receiver Section
The receiver of the HFBR-53D5 includes a silicon PIN
photodiode mounted together with a custom, silicon
bipolar transimpedance preamplifier IC in an OSA. This
OSA is mated to a custom silicon bipolar circuit that
provides post-amplification and quantization. The
HFCT-53D5 utilizes an InP PIN photodiode in the same
configuration. The post-amplifier also includes a Signal
Detect circuit which provides a PECL logic-high output
upon detection of a usable input optical signal level.
This singleended PECL output is designed to drive a
standard PECL input through a 50 W PECL load.
Features
• Compliant with Specifications for IEEE- 802.3z
Gigabit Ethernet
• Industry Standard Mezzanine Height 1 x 9 Package
Style with Integral Duplex SC Connector
• Performance
HFBR-53D5:
220 m with 62.5/125 mm MMF
500 m with 50/125 mm MMF
HFCT-53D5:
550 m with 62.5/125 mm MMF
550 m with 50/125 mm MMF
10 km with 9/125 SMF
• IEC 60825-1 Class 1/CDRH Class I Laser Eye Safe
• Single +5 V Power Supply Operation with PECL
Logic Interfaces
• Wave Solder and Aqueous Wash Process
Compatible
Related Products
• Physical Layer ICs Available for Optical or Copper
Interface (HDMP-1636A/1646A)
• Versions of this Transceiver Module Also Available
for Fibre Channel (HFBR/HFCT-53D3)
• Gigabit Interface Converters (GBIC) for Gigabit
Ethernet (CX, SX, LX)
Applications
• Switch to Switch Interface
• Switched Backbone Applications
• High Speed Interface for File Servers
• High Performance Desktops
1 page  
Electromagnetic Interference (EMI)
One of a circuit board designer’s foremost concerns is
the control of electromagnetic emissions from
electronic equipment. Success in controlling generated
Electromagnetic Interference (EMI) enables the designer
to pass a governmental agency’s EMI regulatory
standard; and more importantly, it reduces the
possibility of interference to neighboring equipment.
There are three options available for the HFBR-53D5
and two options for the HFCT-53D5 with regard to EMI
shielding which provide the designer with a means to
achieve good EMI performance. The EMI performance
of an enclosure using these transceivers is dependent
on the chassis design. Avago Technologies encourages
using standard RF suppression practices and avoiding
poorly EMI-sealed enclosures.
The first configuration is a standard HFBR-53D5 fiber-
optic transceiver that has no external EMI shield. This
unit is for applications where EMI is either not an issue
for the designer, or the unit resides completely inside
a shielded enclosure, or the module is used in low
density, extremely quiet applications. The HFCT-53D5
is not available for use without an external shield.
The second configuration, option EM, is for EMI
shielding applications where the position of the
transceiver module will extend outside the equipment
enclosure. The metallized plastic package and integral
external metal shield of the transceiver helps locally to
terminate EM fields to the chassis to prevent their
emissions outside the enclosure. This metal shield
contacts the panel or enclosure on the inside of the
aperture on all but the bottom side of the shield and
provides a good RF connection to the panel. This option
can accommodate various panel or enclosure thickness,
i.e., .04 in. min. to 0.10 in. max. The reference plane for
this panel thickness variation is from the front surface
of the panel or enclosure. The recommended length
for protruding the HFBR/HFCT-53D5EM transceiver
beyond the front surface of the panel or enclosure is
0.25 in. With this option, there is flexibility of
positioning the module to fit the specific need of the
enclosure design. (See Figure 6 for the mechanical
drawing dimensions of this shield.)
The third configuration, option FM, is for applications
that are designed to have a flush mounting of the
module with respect to the front of the panel or
enclosure. The flush-mount design accommodates a
large variety of panel thickness, i.e., 0.04 in. min. to
0.10 in. max. Note the reference plane for the flush-
mount design is the interior side of the panel or
enclosure. The recommended distance from the
centerline of the transceiver front solder posts to the
inside wall of the panel is 0.55 in. This option contacts
the inside panel or enclosure wall on all four sides of
this metal shield. See Figure 8 for the mechanical
drawing dimensions of this shield.
The two metallized designs are comparable in their
shielding effectiveness. Both design options connect
only to the equipment chassis and not to the signal or
logic ground of the circuit board within the equipment
closure. The front panel aperture dimensions are
recommended in Figures 7 and 9. When layout of the
printed circuit board is done to incorporate these
metal-shielded transceivers, keep the area on the
printed circuit board directly under the metal shield
free of any components and circuit board traces. For
additional EMI performance advantage, use duplex SC
fiber-optic connectors that have low metal content
inside them. This lowers the ability of the metal fiber-
optic connectors to couple EMI out through the
aperture of the panel or enclosure.
Evaluation Kit
To help you in your preliminary transceiver evaluation,
Avago Technologies offers a 1250 MBd Gigabit Ethernet
evaluation board (Part # HFBR-0535). This board allows
testing of the fiber-optic VCSEL transceiver. It includes
the HFBR-53D5 transceiver, test board, and application
instructions. For single mode transceiver evaluation the
HFCT-53D5 can be substituted on this evaluation board.
In addition, a complementary evaluation board is
available for the HDMP-1636A 1250 MBd Gigabit
Ethernet serializer/ deserializer (SERDES) IC. (Part #
HDMP-163k) Please contact your local Field Sales
representative for ordering details.
5
5 Page 
Table 1. Pinout Table
Pin Symbol Functional Description
Mounting Pins The mounting pins are provided for transceiver mechanical attachment to the circuit board. They are
embedded in the nonconductive plastic housing and are not connected to the transceiver internal
circuit, nor is there a guaranteed connection to the metallized housing in the EM and FM versions.
They should be soldered into plated-through holes on the printed circuit board.
1 VEER
Receiver Signal Ground
Directly connect this pin to receiver signal ground plane. (For HFBR-53D5, VEER = VEET
2 RD+ Receiver Data Out
RD+ is an open-emitter output circuit. Terminate this high-speed differential PECL output with
standard PECL techniques at the follow-on device input pin.
3 RD-
Receiver Data Out Bar
RD- is an open-emitter output circuit. Terminate this high-speed differential PECL output with
standard PECL techniques at the follow-on device input pin.
4 SD
Signal Detect
Normal optical input levels to the receiver result in a logic "1" output, VOH, asserted. Low input
optical levels to the receiver result in a fault condition indicated by a logic "0" output VOH ,
deasserted.
Signal Detect is a single-ended PECL output. SD can be terminated with standard PECL techniques
via 50 Ω to VCCR - 2V. Alternatively, SD can be loaded with a 270Ω resistor to VEER to conserve
electrical power with small compromise to signal quality. If Signal Detect output is not used, leave it
open-circuited.
This Signal Detect output can be used to drive a PECL input on an upstream circuit, such as, Signal
Detect input pr Loss of Signal-bar.
5 VCCR Receiver Power Supply
Provide +5 Vdc via the recommended receiver power supply filter circuit.
Locate the power supply filter circuit as close as possible to the VCCR pin.
6 VCCT
Transmitter Power Supply
Provide +5 Vdc via the recommended transmitter power supply filter circuit.
Locate the power supply filter circuit as close as possible to the VCCT pin.
7 TD-
Transmitter Data In-Bar
Terminate this high-speed differential PECL input with standard PECL techniques at the transmitter
input pin.
8 TD+ Transmitter Data In
Terminate this high-speed differential PECL input with standard PECL techniques at the transmitter
input pin.
9 VEET
Transmitter Signal Ground
Directly connect this pin to the transmitter signal ground plane.
1.3
1.0
0.8
0.5
0.2
0
-0.2
0 0.22 0.375
0.625 0.78 1.0
NORMALIZED TIME
Figure 1. Transmitter Optical Eye Diagram Mask.
11
1 = V EER
2 = RD+
3 = RD-
4 = SD
5 = V CCR
6 = V CCT
7 = TD-
8 = TD+
9 = V EET
NIC
RX
TX
NIC
TOP VIEW
NIC = NO INTERNAL CONNECTION (MOUNTING PINS)
Figure 2. Pin-Out.
11 Page | ||
| Páginas | Total 18 Páginas | |
| PDF Descargar | [ Datasheet HFBR-53D5.PDF ] | |
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