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Número de pieza | K3418 | |
Descripción | Silicon N Channel MOS FET | |
Fabricantes | Renesas | |
Logotipo | ||
Hay una vista previa y un enlace de descarga de K3418 (archivo pdf) en la parte inferior de esta página. Total 8 Páginas | ||
No Preview Available ! 2SK3418
Silicon N Channel MOS FET
High Speed Power Switching
Features
• Low on-resistance
RDS(on) = 4.3 mΩ typ.
• Capable of 4 V gate drive
• High speed switching
Outline
TO-220AB
D
G
S1
2
3
Absolute Maximum Ratings
Item
Drain to source voltage
Gate to source voltage
Drain current
Drain peak current
Body-drain diode reverse drain current
Avalanche current
Avalanche energy
Channel dissipation
Channel temperature
Storage temperature
Notes: 1. PW ≤ 10µs, duty cycle ≤ 1%
2. Value at Tc = 25°C
3. Value at Tch = 25°C, Rg ≥ 50 Ω
Symbol
VDSS
VGSS
ID
ID (pulse)Note1
IDR
IAPNote3
EARNote3
PchNote2
Tch
Tstg
REJ03G0407-0200
(Previous ADE-208-941 (Z))
Rev.2.00
Sep.10.2004
1. Gate
2. Drain
(Flange)
3. Source
Ratings
60
±20
85
340
85
60
308
110
150
– 55 to +150
(Ta = 25°C)
Unit
V
V
A
A
A
A
mJ
W
°C
°C
Rev.2.00 Sep. 10, 2004 page 1 of 7
1 page 2SK3418
Reverse Drain Current vs.
Source to Drain Voltage
100
10 V
80
5V
60
VGS = 0, – 5 V
40
20
Pulse Test
0 0.4 0.8 1.2 1.6 2.0
Source to Drain Voltage VSD (V)
Maximum Avalanche Energy vs.
Channel Temperature Derating
400
I AP = 60 A
V DD = 15 V
320 duty < 0.1 %
Rg > 50 Ω
240
160
80
0
25 50 75 100 125 150
Channel Temperature Tch (°C)
Normalized Transient Thermal Impedance vs. Pulse Width
3
1
D=1
Tc = 25°C
0.5
0.3
0.2
0.1 0.1
0.03
0.05
0.02
0.011shot
pulse
0.01
10 µ
100 µ
θch – c(t) = γs (t) • θch – c
θch – c = 1.14°C/W, Tc = 25°C
PDM
D = PW
T
PW
T
1m
10 m
100 m
Pulse Width PW (S)
1
10
Vin
15 V
Avalanche Test Circuit
V DS
Monitor
Rg
L
I AP
Monitor
D. U. T
VDD
50 Ω
Avalanche Waveform
EAR =
1
2
• L • I AP 2•
VDSS
VDSS – V DD
I AP
ID
V (BR)DSS
V DS
VDD
0
Rev.2.00 Sep. 10, 2004 page 5 of 7
5 Page |
Páginas | Total 8 Páginas | |
PDF Descargar | [ Datasheet K3418.PDF ] |
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