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PDF TC8020 Data sheet ( Hoja de datos )
| Número de pieza | TC8020 | |
| Descripción | N- and P-Channel Enhancement-Mode MOSFET | |
| Fabricantes | Supertex | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de TC8020 (archivo pdf) en la parte inferior de esta página. Total 8 Páginas | ||
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Supertex inc.
TC8020
Six Pair, N- and P-Channel
Enhancement-Mode MOSFET
Features
►►High voltage, vertical DMOS technology
►►Integrated gate-to-source resistor
►►Integrated gate-to-source Zener diode
►►Typical peak output +/-3.5A at 50V
►►Low threshold, low on-resistance
►►Low input & output capacitance
►►Fast switching speeds
►►Electrically isolated N- and P-MOSFET pairs
Applications
►►High voltage pulsers
►► Amplifiers
►► Buffers
►►Piezoelectric transducer drivers
►►General purpose line drivers
►►Logic level interfaces
General Description
The Supertex TC8020 consists of six pairs of high voltage,
low threshold N- and P-channel MOSFETs in a 56-lead QFN
package. All MOSFETs have integrated gate-to-source resistors
and gate-to-source Zener diode clamps which are desired for
high voltage pulser applications. The complimentary, high-speed,
high voltage, gate-clamped N- and P-channel MOSFET pairs
utilize an advanced vertical DMOS structure and Supertex’s well-
proven silicon-gate manufacturing process. This combination
produces a device with the power handling capabilities of bipolar
transistors and with the high input impedance and positive
temperature coefficient inherent in MOS devices.
Characteristic of all MOS structures, this device is free from
thermal runaway and thermally-induced secondary breakdown.
Supertex’s vertical DMOS FETs are ideally suited to a wide
range of switching and amplifying applications where very
low threshold voltage, high breakdown voltage, high input
impedance, low input and output capacitance, and fast switching
speeds are desired.
Typical Application
+3.3V +12V
+12V +12V
VPP2
VPP1
1.8 to 3.3V
CMOS
Input Logic
VLL/EN AVDD
VDD1 VDD2
OP1A
ON1A
OP2A
SELA
POSA
NEGA
POSB
NEGB
SELB
MD1715
ON2A
OP3A
ON3A
OP1B
ON2A
OP2B
ON2B
OP3B
AGND GND AVSS(SUB)
VSS
ON3B
10nF
10nF
10nF
10nF
10nF
10nF
10nF
10nF
SP6 SP3 SP5 SP2 SP4 SP1
GP1
DP1
GN1
DN1
GP2
DP2
GN2
DN2
GP3
DP3
GN3
GP4 TC8020 DN3
DP4
GN4
DN4
GP5
DP5
GN5
DN5
GP6
DP6
GN6
DN6
PAD SN6 SN3 SN5 SN2 SN4 SN1
TX(A)
TX(B)
Doc.# DSFP-TC8020
C091112
-12V
-12V
VNN2
VNN1
Supertex inc.
www.supertex.com
1 page  
Test Circuit
+12V
AVDD
+12V
VDD1
+12V
VDD2
VDD2
OP1
VDD2
ON1
VLL/EN
SEL
POS
NEG
Control
Logic
and
Level
Translation
High Speed
Gate Buffers
VDD1
OP2
VDD1
ON2
GND
High Speed
Gate Buffers
OP3
VSS
VDD1
ON3
GND
Doc.# DSFP-TC8020
C091112
MD1715
1 OF 2-CH
PAD AVSS
-12V
VSS
-12V
5
TC8020
GP1
GN1
GP2
GN2
VPP1
SP1
DP1
DN1
VNN1
SN1
VPP2
SP2
DP2
DN2
VNN2
SN2
100Ω
SP3
GP3
GN3
DP3
DN3
TC8020
6 of 12-FETs
PAD
SN3
Supertex inc.
www.supertex.com
5 Page | ||
| Páginas | Total 8 Páginas | |
| PDF Descargar | [ Datasheet TC8020.PDF ] | |
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