DataSheet.es    


PDF IDT6V49205A Data sheet ( Hoja de datos )

Número de pieza IDT6V49205A
Descripción FREESCALE P10XX AND P20XX SYSTEM CLOCK
Fabricantes Integrated Device Technology 
Logotipo Integrated Device Technology Logotipo



Hay una vista previa y un enlace de descarga de IDT6V49205A (archivo pdf) en la parte inferior de esta página.


Total 16 Páginas

No Preview Available ! IDT6V49205A Hoja de datos, Descripción, Manual

DATASHEET
FREESCALE P10XX AND P20XX SYSTEM CLOCK
W/66.66M DDR CLOCK
IDT6V49205A
General Description
The IDT6V49205A is a main clock for Freescale P10xx and
P20xx-based systems. It has a selectable System CCB
clock and a 66.66MHz DDRCLK. The IDT6V49205A also
provides LP-HCSL PCIe outputs for low power and reduced
board space.
Output Features
1 - Sys_CCB 3.3V LVCMOS output @ 100M/83.33M/
80M/66.66M
1 - DDRCLK 3.3V LVCMOS output @ 66.66M
1 - 125M 3.3V LVCMOS output
6 - LP-HCSL PCIe pairs selectable @ 100M or 125M
6 - 25MHz 3.3V LVCMOS outputs
2 - 2.048M 3.3V LVCMOS outputs
2 - USB 3.3V LVCMOS outputs @12M or 24M
Key Specifications
PCIe Gen1-2-3 compliant
<3p rms phase noise on REF outputs
Recommended Application
System Clock for Freescale P10xx and P20xx-based
designs
Features
Replaces 11 crystals, 2 oscillators and 3 clock
generators; lowers cost, power and area
LP-HCSL PCIe outputs reduce termination resistors by
50% while saving 67% power; reduces board area and
power
Industrial temperature range operation; supports
demanding environmental conditions
Advanced 3.3V CMOS process; high-performance,
low-power
Supports independent spread spectrum on
Sys_CCB/DDRCLK and PCIe outputs
Packaged as 48-pin TSSOP or 48-pin 7x7mm VFQFPN
with 0.5mm pad pitch;– Pb-free, RoHS compliant
Block Diagram
SCLK
SDATA
^FS0
^FS1
^SELPCIE125#_100
X1
25MHz
Crystal
X2
Control
Logic
Crystal
Oscillator
PLL1
(SS)
PLL4
(SS)
PLL3
(non-
SS)
PLL2
(non-
SS)
100MHz
GND
Sys_CCB
66M_SS
PCIe_LR(5:0)
USB_CLK(2:1)
2.048M(1:0)
125M
REF(5:0)
IDT® FREESCALE P10XX AND P20XX SYSTEM CLOCK W/66.66M DDR CLOCK
1 IDT6V49205A REV M 021214

1 page




IDT6V49205A pdf
IDT6V49205A
FREESCALE P10XX AND P20XX SYSTEM CLOCK W/66.66M DDR CLOCK
Absolute Maximum Ratings
Stresses above the ratings listed below can cause permanent damage to the IDT6V49205A. These ratings, which are
standard values for IDT commercially rated parts, are stress ratings only. Functional operation of the device at these or any
other conditions above those indicated in the operational sections of the specifications is not implied. Exposure to absolute
maximum rating conditions for extended periods can affect product reliability. Electrical parameters are guaranteed only over
the recommended operating temperature range.
PARAMETER
Maximum Supply Voltage
SYMBOL
VDDxxx
CONDITIONS
Supply Voltage
Maximum Input Voltage
VIH
Referenced to GND
Minimum Input Voltage
VIL
Referenced to GND
Storage Temperature
Ts
-
JunctionTemperature
Input ESD protection
Tj
ESD prot
-
Human Body Model
NOTES on Absolute Max Parameters
1 Operation under these conditions is neither implied, nor guaranteed.
MIN
GND - 0.5
-65
2000
TYP MAX
4.6
VDD + 0.5
150
125
UNITS
V
V
V
°C
°C
V
Notes
1
1
1
1
1
Electrical Characteristics - Input/Supply/Common Output DC Parameters
TAMB = -40 to +85°C; VDD = 3.3 V +/-5%, All outputs driving test loads (unless noted otherwise).
PARAMETER
Ambient Operating Temp
Supply Voltage
SYMBOL
TAMB
VDDxxx
CONDITIONS
-
Supply Voltage
Power supply Ramp Time
TPWRRMP
Power supply ramp must be montonic
Latched Input High Voltage
VIH_LI
Single-ended Latched Inputs
Latched Input Low Voltage
VIL_LI
Single-ended Latched Inputs
Input Leakage Current
IIN
VIN = VDD , VIN = GND
Operating Supply Current
IDDOP3.3
All outputs loaded and running
Input Frequency
Fi
MIN
-40
3.135
2.1
VSS - 0.3
-5
23
TYP MAX UNITS
25 85
°C
3.3 3.465
V
4 ms
VDD + 0.3
0.8
V
V
5 uA
119 155
25 27
mA
MHz
Pin Inductance
Lpin
57
nH
Input Capacitance
CIN
COUT
Logic Inputs
Output pin capacitance
1.5 3
5
5
6
pF
pF
Clk Stabilization
CINX
TSTAB
X1 & X2 pins
From VDD Power-Up or de-assertion of PD
to 1st clock
56
3.2 5
pF
ms
Tfall_SE
Trise_SE
TFALL
TRISE
Fall/rise time of all 3.3V control inputs from
20-80%
10 ns
10 ns
SMBus Voltage
VDD
2.7 3.3 V
Low-level Output Voltage
Current sinking at
VOLSMB = 0.4 V
SCLK/SDATA
Clock/Data Rise Time
SCLK/SDATA
Clock/Data Fall Time
Maximum SMBus Operating
Frequency
VOLSMB
IPULLUP
TRI2C
TFI2C
FSMBUS
@ IPULLUP
SMB Data Pin
(Max VIL - 0.15) to
(Min VIH + 0.15)
(Min VIH + 0.15) to
(Max VIL - 0.15)
4
100
0.4
1000
300
V
mA
ns
ns
kHz
NOTES on DC Parameters: (unless otherwise noted, guaranteed by design and characterization, not 100% tested in production).
1 Signal is required to be monotonic in this region.
2 Input leakage current does not include inputs with pull-up or pull-down resistors
3 For margining purposes only. Normal operation should have Fin =25MHz
Notes
2
3
1
1
IDT® FREESCALE P10XX AND P20XX SYSTEM CLOCK W/66.66M DDR CLOCK
5 IDT6V49205A REV M 021214

5 Page





IDT6V49205A arduino
IDT6V49205A
FREESCALE P10XX AND P20XX SYSTEM CLOCK W/66.66M DDR CLOCK
Byte 5 is Reserved
Byte 6 PCI Express Amplitude Control Register
Bit Name
Description
7 PCIE_AMP1
PCI Express Amplitude Control
6 PCIE_AMP0
5 Reserved
Reserved
4 SELPCIE125#_100
PCI Express latch select
3 Reserved
Reserved
2 Reserved
Reserved
1 Reserved
Reserved
0 Reserved
Reserved
Type
RW
RW
R
R
RW
RW
RW
RW
01
See Table 5: PCIe Amplitude Selection
Table
--
125MHz
100MHz
--
--
--
--
Default
0
1
1
latch
0
1
0
1
Byte 7 Revision and Vendor ID Register
Bit Name
Description
7 REV ID
6 REV ID
5 REV ID
Revision ID
4 REV ID
3 Vendor ID
2 Vendor ID
1 Vendor ID
Vendor ID
0 Vendor ID
Type
R
R
R
R
R
R
R
R
0
-
-
-
-
-
-
-
-
1 Default
-0
-0
-0
-0
-0
-0
-0
-1
Byte 8 Byte Count Register
Bit Name
Description
7 BC7
6 BC6
5 BC5
4 BC4
Byte Count Programming b(7:0)
3 BC3
2 BC2
1 BC1
0 BC0
Type
RW
RW
RW
RW
RW
RW
RW
RW
01
Writing to this register will configure how
many bytes will be read back.
Default
0
0
0
0
0
1
0
1
Recommended Crystal Characteristics (3225 package)
PARAMETER
VALUE
UNITS NOTES
Frequency
Resonance Mode
Frequency Tolerance @ 25°C
Frequency Stability, ref @ 25°C Over
Operating Temperature Range
Temperature Range (commerical)
Temperature Range (industrial)
Equivalent Series Resistance (ESR)
25
Fundamental
±20
±20
0~70
-40~85
50
MHz
-
PPM Max
PPM Max
°C
°C
Max
1
1
1
1
1
1
1
Shunt Capacitance (CO)
Load Capacitance (CL)
Drive Level
Aging per year
7
pF Max
1
8
pF Max
1
0.3
mW Max
1
±5
PPM Max
1
Notes:
1. Fox Electronics FX325BS Series / 8pF / 20ppm, visit Foxonline.com
IDT® FREESCALE P10XX AND P20XX SYSTEM CLOCK W/66.66M DDR CLOCK
11 IDT6V49205A REV M 021214

11 Page







PáginasTotal 16 Páginas
PDF Descargar[ Datasheet IDT6V49205A.PDF ]




Hoja de datos destacado

Número de piezaDescripciónFabricantes
IDT6V49205AFREESCALE P10XX AND P20XX SYSTEM CLOCKIntegrated Device Technology
Integrated Device Technology

Número de piezaDescripciónFabricantes
SLA6805M

High Voltage 3 phase Motor Driver IC.

Sanken
Sanken
SDC1742

12- and 14-Bit Hybrid Synchro / Resolver-to-Digital Converters.

Analog Devices
Analog Devices


DataSheet.es es una pagina web que funciona como un repositorio de manuales o hoja de datos de muchos de los productos más populares,
permitiéndote verlos en linea o descargarlos en PDF.


DataSheet.es    |   2020   |  Privacy Policy  |  Contacto  |  Buscar