|
|
PDF ILI9486L Data sheet ( Hoja de datos )
| Número de pieza | ILI9486L | |
| Descripción | a-Si TFT LCD Single Chip Driver | |
| Fabricantes | ILITEK | |
| Logotipo |  |
|
Hay una vista previa y un enlace de descarga de ILI9486L (archivo pdf) en la parte inferior de esta página. Total 30 Páginas | ||
|
No Preview Available !
ILI9486L
a-Si TFT LCD Single Chip Driver
320RGBx480 Resolution and 262K-color
Specification
Preliminary
Version: V0.06
Document No: ILI9486L_DS_V006.pdf
ILI TECHNOLOGY CORP.
8F, No. 38, Taiyuan St, Jhubei City,
Taiwan 302, R.O.C.
Tel.886-3-5600099; Fax.886-3-5600585
http://www.ilitek.com
1 page  
a-Si TFT LCD Single Chip Driver
320RGBx480 Resolution and 262K-color
ILI9486L
8.2.65. CABC Control 2 (C8h) ....................................................................................................... 166
8.2.66. CABC Control 3 (C9h) ....................................................................................................... 167
8.2.67. CABC Control 4 (CAh)....................................................................................................... 169
8.2.68. CABC Control 5 (CBh)....................................................................................................... 170
8.2.69. CABC Control 6 (CCh) ...................................................................................................... 172
8.2.70. CABC Control 7 (CDh) ...................................................................................................... 173
8.2.71. CABC Control 8 (CEh)....................................................................................................... 174
8.2.72. CABC Control 9 (CFh)....................................................................................................... 175
8.2.73. NV Memory Write (D0h) .................................................................................................... 176
8.2.74. NV Memory Protection Key (D1h) ..................................................................................... 177
8.2.75. NV Memory Status Read (D2h) ......................................................................................... 178
8.2.76. Read ID4 (D3h) ................................................................................................................. 179
8.2.77. PGAMCTRL(Positive Gamma Control) (E0h) ................................................................... 180
8.2.78. NGAMCTRL (Negative Gamma Correction) (E1h) ........................................................... 181
8.2.79. Digital Gamma Control 1 (E2h) ......................................................................................... 182
8.2.80. Digital Gamma Control 2 (E3h) ......................................................................................... 182
8.2.81. SPI Read Command Setting(FBh) .................................................................................... 183
9. Display Data RAM ..................................................................................................................................... 184
9.1. Configuration ................................................................................................................................ 184
9.2. Memory to Display Address Mapping .......................................................................................... 185
9.3. MCU to memory write/read direction ........................................................................................... 186
10. Tearing Effect Information ......................................................................................................................... 189
10.1. Tearing Effect Line ....................................................................................................................... 190
10.1.1. Tearing Effect Line Modes ................................................................................................. 190
10.1.2. Tearing Effect Line Timing ................................................................................................. 191
11. Sleep Out – Command and Self-Diagnostic Functions ............................................................................ 192
11.1. Register loading Detection ........................................................................................................... 192
11.2. Functionality Detection................................................................................................................. 193
12. Power ON/OFF Sequence ........................................................................................................................ 194
12.1. Case 1 – RESX line is held High or Unstable by Host at Power ON ........................................... 194
12.2. Case 2 – RESX line is held Low by Host at Power ON ............................................................... 194
12.3. Uncontrolled Power Off ................................................................................................................ 196
13. Power Level Definition .............................................................................................................................. 197
13.1. Power Levels................................................................................................................................ 197
13.2. Power Flow Chart......................................................................................................................... 198
13.3. LCM Voltage Generation.............................................................................................................. 199
14. Reset ......................................................................................................................................................... 200
14.1. Registers ...................................................................................................................................... 200
14.2. Output Pins, I/O Pins.................................................................................................................... 201
The information contained herein is the exclusive property of ILI Technology Corp. and shall not be distributed,
reproduced, or disclosed in whole or in part without prior written permission of ILI Technology Corp.
Page 5 of 219
Version: 0.06
5 Page 
DB[17:0]
VSYNC
HSYNC
ENABLE
DOTCLK
a-Si TFT LCD Single Chip Driver
320RGBx480 Resolution and 262K-color
ILI9486L
A 18-bit parallel bi-directional data bus for MCU system
Interface Mode
Data Pin in Use
8-bit MCU System Interface Mode
DB[7:0]
9-bit MCU System Interface Mode
DB[8:0]
I/O MPU
16-bit MCU System Interface Mode
18-bit MCU System Interface Mode
DB[15:0]
DB[17:0]
16-bit RGB Interface Mode
DB[15:0]
18-bit RGB Interface Mode
DB[17:0]
Fix to DGND level when not in use.
I
MPU
Frame synchronizing signal for RGB interface operation.
Fix to DGND level when not in use.
I
MPU
- Line synchronizing signal for RGB interface operation.
Fix to DGND level when not in use.
- Data enable signal for RGB interface operation.
I MPU
Low : access enabled.
High : access inhibited.
Fix to DGND level when not in use.
I
MPU
- Dot clock signal for RGB interface operation.
Fix to IOVCC level when not in use.
LCD Driving Signals
Pin Name
I/O Type
Descriptions
S961~S1
O
LCD
- Source output voltage signals applied to liquid crystal.
Leave the pin to open when not in use.
- Gate line output signals.
G480~G1
O LCD
VGH: the level selecting gate lines
VGL: the level not selecting gate lines
Leave the pin to open when not in use.
VCOM
O
-
- The power supply of common voltage in DC VCOM driving.
- The voltage range is set between -2V to 0V.
- Internal generated stable power for source driver unit.
- The voltage level can be set by VRH1[4:0].
VREG1OUT
O
- - VREG1OUT is a positive grayscale reference voltage of source
driver.
- VREG1OUT =3.6~5.5V
- Internal generated stable power for source driver unit.
- The voltage level can be set by VRH2[4:0].
VREG2OUT
O
- - VREG2OUT is a negative grayscale reference voltage of source
driver.
- VREG2OUT =-3.6~-5.5V
VGS
I - Reference level for grayscale generating circuit.
Pin Name
VCI
DDVDH
DDVDL
VGH
VGL
Charge-pump and Regulator Circuit
I/O Type
Descriptions
P
Power
supply
- A supply voltage to the analog circuit. Connect to an external
power supply of 2.5 ~ 3.6V.
O
Stabilizing
capacitor
- Power supply for the source driver and VCOM driver.
- Connect to a stabilizing capacitor between DDVDH and
GND.
O
Stabilizing
capacitor
- Power supply for the source driver and VCOM driver.
- Connect to a stabilizing capacitor between DDVDL and
GND.
O
Stabilizing
capacitor
- Power supply for the gate driver.
- Connect to a stabilizing capacitor between VGH and GND.
O Stabilizing - Power supply for the gate driver. .
The information contained herein is the exclusive property of ILI Technology Corp. and shall not be distributed,
reproduced, or disclosed in whole or in part without prior written permission of ILI Technology Corp.
Page 11 of 219
Version: 0.06
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet ILI9486L.PDF ] | |
Hoja de datos destacado
| Número de pieza | Descripción | Fabricantes |
| ILI9486 | a-Si TFT LCD Single Chip Driver | ILITEK |
| ILI9486L | a-Si TFT LCD Single Chip Driver | ILITEK |
| Número de pieza | Descripción | Fabricantes |
| SLA6805M | High Voltage 3 phase Motor Driver IC. |
 Sanken |
| SDC1742 | 12- and 14-Bit Hybrid Synchro / Resolver-to-Digital Converters. |
 Analog Devices |
|
DataSheet.es es una pagina web que funciona como un repositorio de manuales o hoja de datos de muchos de los productos más populares, |
| DataSheet.es | 2020 | Privacy Policy | Contacto | Buscar |