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NVMFD5489NLWFT3G fiches techniques PDF

ON Semiconductor - Power MOSFET ( Transistor )

Numéro de référence NVMFD5489NLWFT3G
Description Power MOSFET ( Transistor )
Fabricant ON Semiconductor 
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NVMFD5489NLWFT3G fiche technique
NVMFD5489NL
Power MOSFET
60 V, 65 mW, 12 A, Dual N−Ch Logic Level
Features
Small Footprint (5x6 mm) for Compact Designs
Low RDS(on) to Minimize Conduction Losses
Low Capacitance to Minimize Driver Losses
175°C Operating Temperature
NVMFD5489NLWF − Wettable Flank Option for Enhanced Optical
Inspection
AEC−Q101 Qualified and PPAP Capable
This is a Pb−Free Device
MAXIMUM RATINGS (TJ = 25°C unless otherwise noted)
Parameter
Symbol Value Unit
Drain−to−Source Voltage
Gate−to−Source Voltage
Continuous Drain Cur-
rent RYJ−mb
(Notes 1, 2, 3, 4)
Power Dissipation
RYJ−mb (Notes 1, 2, 3)
Steady
State
Tmb = 25°C
Tmb = 100°C
Tmb = 25°C
Tmb = 100°C
Continuous Drain Cur-
rent RqJA
(Notes 1, 3 & 4)
Power Dissipation
RqJA (Notes 1 & 3)
Steady
State
TA = 25°C
TA = 100°C
TA = 25°C
TA = 100°C
Pulsed Drain Current TA = 25°C, tp = 10 ms
Operating Junction and Storage Temperature
VDSS
VGS
ID
PD
ID
PD
IDM
TJ, Tstg
60
"20
12
8.8
23.4
11.7
4.5
3.2
3.0
1.5
62
−55 to
175
V
V
A
W
A
W
A
°C
Source Current (Body Diode)
Single Pulse Drain−to−Source Avalanche
Energy (TJ = 25°C, IL(pk) = 19.5 A, L = 0.1 mH,
RG = 25 W)
Lead Temperature for Soldering Purposes
(1/8from case for 10 s)
IS
EAS
TL
22 A
19 mJ
260 °C
Stresses exceeding those listed in the Maximum Ratings table may damage the
device. If any of these limits are exceeded, device functionality should not be
assumed, damage may occur and reliability may be affected.
THERMAL RESISTANCE MAXIMUM RATINGS (Note 1)
Parameter
Symbol Value Unit
Junction−to−Mounting Board (top) − Steady
State (Notes 2, 3)
RYJ−mb
6.4
Junction−to−Ambient − Steady State (Note 3)
Junction−to−Ambient − Steady State
(min footprint)
RqJA
50 °C/W
161
1. The entire application environment impacts the thermal resistance values shown,
they are not constants and are only valid for the particular conditions noted.
2. Psi (Y) is used as required per JESD51−12 for packages in which
substantially less than 100% of the heat flows to single case surface.
3. Surface−mounted on FR4 board using a 650 mm2, 2 oz. Cu pad.
4. Continuous DC current rating. Maximum current for pulses as long as 1
second are higher but are dependent on pulse duration and duty cycle.
www.onsemi.com
V(BR)DSS
60 V
RDS(on) MAX
65 mW @ 10 V
79 mW @ 4.5 V
ID MAX
12 A
Dual N−Channel
D1
D2
G1 G2
S1 S2
MARKING DIAGRAM
1
DFN8 5x6
(SO8FL)
CASE 506BT
D1 D1
S1
G1 XXXXXX
S2 AYWZZ
G2
D2 D2
D1
D1
D2
D2
XXXXXX = 5489NL
XXXXXX = (NVMFD5489NL) or
XXXXXX = 5489LW
XXXXXX = (NVMFD5489NLWF)
A = Assembly Location
Y = Year
W = Work Week
ZZ = Lot Traceability
ORDERING INFORMATION
Device
Package Shipping
NVMFD5489NLT1G
DFN8
1500/
(Pb−Free) Tape & Reel
NVMFD5489NLT3G
DFN8
5000/
(Pb−Free) Tape & Reel
NVMFD5489NLWFT1G DFN8
1500/
(Pb−Free) Tape & Reel
NVMFD5489NLWFT3G DFN8
5000/
(Pb−Free) Tape & Reel
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specification
Brochure, BRD8011/D.
© Semiconductor Components Industries, LLC, 2015
May, 2015 − Rev. 3
1
Publication Order Number:
NVMFD5489NL/D

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