PDF ADV7612 Data sheet ( Hoja de datos )

Número de pieza	ADV7612
Descripción	225 MHz HDMI Receiver
Fabricantes	Analog Devices
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No Preview Available ! Data Sheet Dual Port, Xpressview, 225 MHz HDMI Receiver ADV7612 FEATURES High-Definition Multimedia Interface (HDMI®) 1.4a features supported All mandatory and additional 3D video formats supported Extended colorimetry, including sYCC601, Adobe RGB, Adobe YCC 601, xvYCC extended gamut color CEC 1.4-compatible HDMI receiver 225 MHz maximum TMDS clock frequency Xpressview fast switching of HDMI ports 36-/30-bit Deep Color and 24-bit color support High-bandwidth Digital Content Protection (HDCP) 1.4 support with internal HDCP keys HDCP repeater support Up to 127 KSVs supported Integrated CEC controller Programmable HDMI equalizer 5 V detect and Hot Plug assert for each HDMI port Audio support Audio support including high bit rate (HBR) and direct stream digital (DSD) S/PDIF (IEC 60958-compatible) digital audio support Supports up to four I2S outputs Advanced audio mute feature Dedicated, flexible audio output port Super audio CD (SACD) with DSD output interface HBR audio Dolby® TrueHD DTS-HD Master Audio™ General Interrupt controller with two interrupt outputs Standard Identification (STDI) circuit Highly flexible 36-bit pixel output interface Internal EDID RAM Any-to-any 3 × 3 color space conversion (CSC) matrix 2-layer PCB design supported 100-lead LQFP_EP, 14 mm × 14 mm package Qualified for Automotive Applications APPLICATIONS Projectors Automotive Video conferencing HDTVs AVR, HTiB Soundbars Video switches FUNCTIONAL BLOCK DIAGRAM HDMI1 HDMI2 FAST SWITCH HDCP KEYS 36 TMDS DDC DEEP COLOR HDMI Rx TMDS DDC HS/VS FIELD/DE COMPONENT PROCESSOR LLC DATA HS VS/FIELD DE LLC 36-BIT YCbCr/RGB 4 I2S S/PDIF DSD HBR MCLK SCLK LRCLK AUDIO OUTPUT 5 MCLK SCLK ADV7612 NOTES 1. LRCLK IS ACCESSIBLE THROUGH THE AP5 PIN. Figure 1. Rev. E Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 ©2010–2014 Analog Devices, Inc. All rights reserved. Technical Support www.analog.com 1 page Data Sheet ADV7612 DATA AND I2C TIMING CHARACTERISTICS Table 2. Parameter CLOCK AND CRYSTAL Crystal Frequency, XTALP Crystal Frequency Stability LLC Frequency Range I2C PORTS SCL Frequency SCL Minimum Pulse Width High1 SCL Minimum Pulse Width Low1 Start Condition Hold Time1 Start Condition Setup Time1 SDA Setup Time1 SCL and SDA Rise Time1 SCL and SDA Fall Time1 Stop Condition Setup Time1 RESET FEATURE Reset Pulse Width CLOCK OUTPUTS LLC Mark-Space Ratio1 DATA AND CONTROL OUTPUTS2 Data Output Transition Time1 I2S PORT, MASTER MODE SCLK Mark-Space Ratio1 LRCLK Data Transition Time1 I2S Data Transition Time1 Symbol Test Conditions/Comments t1 t2 t3 t4 t5 t6 t7 t8 t9:t10 t11 t12 t15:t16 t17 t18 t19 t20 End of valid data to negative clock edge Negative clock edge to start of valid data End of valid data to negative SCLK edge Negative SCLK edge to start of valid data End of valid data to negative SCLK edge Negative SCLK edge to start of valid data 1 Data guaranteed by characterization. 2 With the DLL block on output clock bypassed. Min Typ Max Unit 28.63636 MHz ±50 ppm 13.5 170 MHz 400 kHz 600 ns 1.3 µs 600 ns 600 ns 100 ns 300 ns 300 ns 0.6 µs 5 ms 45:55 55:45 % duty cycle 1.0 2.2 ns 0.0 0.3 ns 45:55 55:45 10 10 5 5 % duty cycle ns ns ns ns Rev. E \| Page 5 of 20 5 Page Data Sheet POWER SUPPLY SEQUENCING POWER-UP SEQUENCE The recommended power-up sequence of the ADV7612 is to power up the 3.3 V supplies first, followed by the 1.8 V supplies. Reset should be held low while the supplies are powered up. Alternatively, the ADV7612 may be powered up by asserting all supplies simultaneously. In this case, care must be taken while the supplies are being established to ensure that a lower rated supply does not go above a higher rated supply level. ADV7612 POWER-DOWN SEQUENCE The ADV7612 supplies may be de-asserted simultaneously as long as a higher rated supply does not go below a lower rated supply. 3.3V 3.3V SUPPLIES 1.8V 1.8V SUPPLIES 3.3V SUPPLIES POWER-UP 1.8V SUPPLIES POWER-UP Figure 7. Recommended Power-Up Sequence Rev. E \| Page 11 of 20 11 Page

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