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Número de pieza | XE8805 | |
Descripción | Sensing Machine Data Acquisition MCU | |
Fabricantes | Semtech | |
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No Preview Available ! XE8805/05A Sensing Machine
Data Acquisition MCU
with Zooming ADC and DACs
XE8805/05A – SX8805R Sensing
Machine – Data Acquisition with 16+10 bit
ZoomingADC™ and buffered DACs
General Description
The XE8805A is a data acquisition ultra low-
power low-voltage system on a chip (SoC) with a
high efficiency microcontroller unit embedded
(MCU), allowing for 1 MIPS at 300uA and 2.4 V,
and multiplying in one clock cycle.
The XE8805A includes a high resolution
acquisition path with the 16+10 bits ZoomingADC
and two buffered DACs.
The XE8805A is available with on chip ROM (the
SX8805) or Multiple-Time-Programmable (MTP)
program memory.
Applications
• Portable, battery operated instruments
• Current loop powered instruments
• Wheatstone bridge interfaces
• Pressure and chemical sensors
• HVAC control
• Metering
• Sports watches, wrist instruments
Key product Features
• Low-power, high resolution ZoomingADC
• 0.5 to 1000 gain with offset cancellation
• up to 16 bits analog to digital converter
• up to 13 inputs multiplexer
• Low-voltage low-power controller operation
• 2 MIPS with 2.4 V to 5.5 V operation
• 300 µA at 1 MIPS over voltage range
• 22 kByte (8 kInstruction) MTP
• 520 Byte RAM data memory
• RC and crystal oscillators
• 5 reset, 22 interrupt, 8 event sources
• 8 bit and 16 bit buffered DACs
• 100 years MTP Flash retention at 55°C
Ordering Information
Product
Temperature range Memory type
XE8805MI028*
-40°C to 85 °C
MTP
XE8805AMI000
-40°C to 85 °C
MTP
XE8805AMI028LF -40°C to 85 °C
MTP
SX8805Rxxx
-40°C to 85 °C**
ROM
*Not for new designs
**Extended temperature range on request
Package
LQFP64
die
LQFP64
Rev 1 January 2006
www.semtech.com
1 page XE8805/05A
VPP/TEST
INSTRUCTION MEMORY
VBAT
VSS
RESET
OSCIN
OSCOUT
VREG
PB(7:0)
CPU
COOLRISC816
8X8 MULTIPLIER
16 CPU REGISTERS
B
U
S
C
O
N
T
R
O
L
L
E
R
RESET BLOCK
WD POR
RC
XTAL
VREG
CLOCK
GENERATION/
POWER
MANAGEMENT
TEST CONTROLLER
8 DATA REGISTERS
IRQ HANDLING
EVN HANDLING
PORT B
address
control
datain
dataout
reset
control
clocks
test
control
irq
evn
VLD
DATA
MEMORY
PORT A
PORT C
ACQUISITION
CHAIN
ZoomingADCTM
VMULT
DAS
Signal D/A
DAB
Bias D/A
USRT
UART
COUNTERS
TIMERS
PWM
PA(7:0)
PC(7:0)
AC_R(3:0)
AC_A(7:0)
VMULT
DAS_OUT
DAS_AI_P
DAS_AI_M
DAS_AO
DAB_R_P
DAB_R_M
DAB_OUT
DAB_AI_P
DAB_AI_M
DAB_AO_P
DAB_AO_M
Figure 1-1. Block schematic of the XE8805/05A circuit.
The UART (universal asynchronous receiver/transmitter) contains a full hardware implementation of the
asynchronous serial link.
The counters/timers/PWM can take their clocks from internal or external sources (on Port A) and can generate
interrupts or events. The PWM is output on Port B.
© Semtech 2006
www.semtech.com
1-3
5 Page 2 XE8805/05A Performance
2.1 Absolute maximum ratings
2.2 Operating range
2.3
2.3.1
2.3.2
Supply configurations
Flash circuit
ROM circuit
2.4 Current consumption
2.5
2.5.1
2.5.2
Operating speed
Flash version
ROM circuit version
XE8805/05A
2-2
2-2
2-3
2-3
2-3
2-5
2-6
2-6
2-6
© Semtech 2006
www.semtech.com
2-1
11 Page |
Páginas | Total 30 Páginas | |
PDF Descargar | [ Datasheet XE8805.PDF ] |
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