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NCV51510 fiches techniques PDF

ON Semiconductor - Termination Source / Sink Regulator

Numéro de référence NCV51510
Description Termination Source / Sink Regulator
Fabricant ON Semiconductor 
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NCV51510 fiche technique
NCP51510, NCV51510
3 Amp VTT Termination
Source / Sink Regulator for
DDR, DDR-2, DDR-3, DDR-4
The NCP51510 is a source/sink Double Data Rate (DDR)
termination regulator specifically designed for low input voltage and
low−noise systems where space is a key consideration. The
NCP51510 maintains a fast transient response and only requires a
minimum VTT load capacitance of 10 mF for output stability. The
NCP51510 supports remote sensing and all power requirements for
DDR VTT bus termination. The NCP51510 can also be used in
low−power chipsets and graphics processor cores that require
dynamically adjustable output voltages. The NCP51510 is available in
the thermally−efficient DFN10 Exposed Pad package, and is rated
both Green and Pb−Free.
Features
Generate DDR Memory Termination Voltage (VTT)
For DDR, DDR−2, DDR−3 and DDR−4 Source / Sink Currents
Supports Loads Up to ±3 A (Typ), Output is Over−Current Protected
Integrated MOSFETs with Thermal Shutdown Protection
Fast Load−Transient Response
PGOOD Output Pin to Monitor Status of VTT Output Regulation
SS Input Pin for Suspend Shutdown mode
VRI Input Reference for Flexible Voltage Tracking
VTTS Input for Remote Sensing (Kelvin Connection)
Built−in Soft−Start, Under Voltage Lockout
Small, Low−Profile 10−pin, 3 x 3 mm DFN Package
NCV51510MWTAG − Wettable Flank Option for Enhanced Optical
Inspection
NCV Prefix for Automotive and Other Applications Requiring
Unique Site and Control Change Requirements; AEC−Q100
Qualified and PPAP Capable*
This is a Pb−Free Device
Applications
DDR Memory Termination
Desktop PC’s, Notebooks, and Workstations
Servers and Networking equipment
Telecom/Datacom, GSM Base Station
Graphics Processor Core Supplies
Set Top Boxes, LCD−TV/PDP−TV, Copier/Printers
Supplies Power for Chipset/RAM as Low as 0.5 V
Active Source/Sink Bus Termination
www.onsemi.com
DFN10
CASE 485C
MARKING DIAGRAM
51510
ALYWG
G
51510 = Specific Device Code
A = Assembly Location
L = Wafer Lot
Y = Year
W = Work Week
G = Pb−Free Package
(Note: Microdot may be in either location)
PIN CONNECTIONS
VRO 1
VCC 2
AGND 3
VRI 4
PGOOD 5
GND
(Top View)
10 PVCC
9 VTT
8 PGND
7 SS
6 VTTS
ORDERING INFORMATION
Device
Package Shipping
NCP51510MNTAG
NCV51510MNTAG*
NCV51510MWTAG*
DFN10
(Pb−Free)
3000 / Tape &
Reel
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.
© Semiconductor Components Industries, LLC, 2015
April, 2015 − Rev. 2
1
Publication Order Number:
NCP51510/D

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